SA614AD,118 NXP Semiconductors, SA614AD,118 Datasheet - Page 7

• Manufacturer Part Number: SA614AD,118
• Description: IC FM IF SYSTEM LOW PWR 16-SOIC
• Manufacturer: NXP Semiconductors

Specifications of SA614AD,118

• Function: FM IF System
• Frequency: 25MHz
• Rf Type: Cellular, ASK, FSK
• Secondary Attributes: RSSI Equipped
• Package / Case: 16-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-1104-2; 933995410118; SA614AD-T

Philips Semiconductors
CIRCUIT DESCRIPTION
The SA614A is a very high gain, high frequency device. Correct
operation is not possible if good RF layout and gain stage practices
are not used. The SA614A cannot be evaluated independent of
circuit, components, and board layout. A physical layout which
correlates to the electrical limits is shown in Figure 3. This
configuration can be used as the basis for production layout.
The SA614A is an IF signal processing system suitable for IF
frequencies as high as 21.4MHz. The device consists of two limiting
amplifiers, quadrature detector, direct audio output, muted audio
output, and signal strength indicator (with log output characteristic).
The sub-systems are shown in Figure 4. A typical application with
45MHz input and 455kHz IF is shown in Figure 5.
IF Amplifiers
The IF amplifier section consists of two log-limiting stages. The first
consists of two differential amplifiers with 39dB of gain and a small
signal bandwidth of 41MHz (when driven from a 50 source). The
output of the first limiter is a low impedance emitter follower with
1k of equivalent series resistance. The second limiting stage
consists of three differential amplifiers with a gain of 62dB and a
1997 Nov 07
Low power FM IF system
6.8 F
+6V
22pF
100nF
47pF
5.5 H
10nF
1.3 H
0.5
to
0.28 H
0.21
to
8
1
1nF
100nF
Figure 5. Typical Application Cellular Radio (45MHz to 455kHz)
7
SA602
2
5.6pF
22pF
6
3
–20
–40
–60
–80
–0
44.545
3rd OVERTURE
XTAL
5
4
NE604A TEST CIRCUIT
–120
10
SFG455A3
0.1 F
–100
602 RF INPUT (dBm) (50 )
614A IF INPUT ( V) (1500 )
100
–80
RSSI (VOLTS)
16
1
AUDIO
7
1k
small signal AC bandwidth of 28MHz. The outputs of the final
differential stage are buffered to the internal quadrature detector.
One of the outputs is available at Pin 9 to drive an external
quadrature capacitor and L/C quadrature tank.
Both of the limiting amplifier stages are DC biased using feedback.
The buffered output of the final differential amplifier is fed back to the
input through 42k resistors. As shown in Figure 4, the input
impedance is established for each stage by tapping one of the
feedback resistors 1.6k from the input. This requires one
additional decoupling capacitor from the tap point to ground.
15
–60
0.1 F
2
THD + NOISE
AM (80% MOD)
0.1 F
10k
MUTE
14
3
NOISE
–40
SFG455A3
100k
+6V
13
4
SA604A
RSSI
–20
12
16
5
Figure 6. First Limiter Bias
15
1
100k
4V
3V
2V
1V
0.1 F
11
6
1.6k
0.1 F
40k
DATA
OUT
42k
C–MSG
FILTER
10
7
9
8
10pF
AUDIO
7k
SR00328
OUT
V+
700 14
Product specification
455kHz
SA614A
0.1 F
SR00327
Q=20