AD8099ARDZ Analog Devices Inc, AD8099ARDZ Datasheet - Page 5

IC OPAMP VF ULN ULDIST 8SOIC

AD8099ARDZ

Manufacturer Part Number
AD8099ARDZ
Description
IC OPAMP VF ULN ULDIST 8SOIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD8099ARDZ

Slew Rate
1350 V/µs
Amplifier Type
Voltage Feedback
Number Of Circuits
1
-3db Bandwidth
510MHz
Current - Input Bias
6µA
Voltage - Input Offset
100µV
Current - Supply
15mA
Current - Output / Channel
178mA
Voltage - Supply, Single/dual (±)
5 V ~ 12 V, ±2.5 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width) Exposed Pad, 8-eSOIC. 8-HSOIC
Op Amp Type
High Speed
No. Of Amplifiers
1
Bandwidth
3.8GHz
Supply Voltage Range
5V To 12V
Amplifier Case Style
SOIC
No. Of Pins
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Output Type
-
Gain Bandwidth Product
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
Power Dissipation
Differential Input Voltage
Differential Input Current
Storage Temperature
Operating Temperature Range
Lead Temperature Range (Soldering 10 sec)
Junction Temperature
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the AD8099 package is
limited by the associated rise in junction temperature (T
the die. The plastic encapsulating the die will locally reach the
junction temperature. At approximately 150°C, which is the
glass transition temperature, the plastic will change its
properties. Even temporarily exceeding this temperature limit
may change the stresses that the package exerts on the die,
permanently shifting the parametric performance of the
AD8099. Exceeding a junction temperature of 150°C for an
extended period can result in changes in silicon devices,
potentially causing failure.
The still-air thermal properties of the package and PCB (θ
the ambient temperature (T
the package (P
The junction temperature can be calculated as
The power dissipated in the package ( P
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins ( V
quiescent current ( I
midsupply, the total drive power is V
dissipated in the package and some in the load ( V
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
T
J
=
T
A
+
D
(
) determine the junction temperature of the die.
P
D
×
S
). Assuming the load ( R
θ
JA
)
A
), and the total power dissipated in
S
/2 × I
D
) is the sum of the
OUT
L
) is referenced to
, some of which is
Rating
12.6 V
See Figure 4
±
±10mA
–65°C to +125°C
–40°C to +125°C
300°C
150°C
S
) times the
1.8 V
OUT
× I
OUT
J
) on
JA
).
),
Rev. B | Page 5 of 28
The difference between the total drive power and the load
power is the drive power dissipated in the package.
RMS output voltages should be considered. If R
V
V
worst case, when V
In single-supply operation with R
is V
Airflow will increase heat dissipation, effectively reducing θ
Also, more metal directly in contact with the package leads
from metal traces, through holes, ground, and power planes will
reduce the θ
plane significantly reduces the overall thermal resistance of the
package. Care must be taken to minimize parasitic capaci-
tances at the input leads of high speed op amps, as discussed in
the PCB Layout section.
Figure 4 shows the maximum safe power dissipation in the
package versus the ambient temperature for the exposed paddle
(e-pad) SOIC-8 (70°C/W), and CSP (70°C/W), packages on a
JEDEC standard 4-layer board. θ
S
S
–, as in single-supply operation, then the total drive power is
× I
P
OUT
D
P
P
OUT
= Quiescent Power + (Total Drive Power – Load Power)
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
D
D
= V
–40
=
=
. If the rms signal levels are indeterminate, consider the
(
(
V
V
S
/2.
JA
S
S
–20
. Soldering the exposed paddle to the ground
×
×
I
I
Figure 4. Maximum Power Dissipation
S
S
)
)
OUT
+
+
0
LFCSP AND SOIC
(
AMBIENT TEMPERATURE (°C)
V
V
= V
S
2
R
S
/
L
4
20
×
S
)
/4 for R
2
V
R
OUT
L
40
JA
L
L
referenced to V
values are approximations.
to midsupply:
V
60
OUT
R
L
2
80
L
100
is referenced to
S
–, worst case
AD8099
120
JA
.

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