MC68HC705SR3CP Freescale Semiconductor, MC68HC705SR3CP Datasheet - Page 50

• Manufacturer Part Number: MC68HC705SR3CP
• Description: IC MCU 3.75K 2.1MHZ OTP 40-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MC68HC705SR3CP

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: LED, POR
• Number Of I /o: 32
• Program Memory Size: 3.75KB (3.75K x 8)
• Program Memory Type: OTP
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Connectivity: -

6
PR2:PR0
These three bits enable the program to select the division ratio of the prescaler. On reset, these
three bits are set to “100”, which corresponds to a division ratio of 16.
6.3
The TDR is a read/write register which contains the current value of the 8-bit count-down timer
counter when read. Reading this register does not disturb the counter operation.
6.4
The timer ceases counting in STOP mode. When STOP mode is exited by an external interrupt
(IRQ or IRQ2), the internal oscillator will resume its operation, followed by internal processor
stabilization delay. The timer is then cleared to zero and resumes its operation. The TIF bit in the
TCR will be set. To avoid generating a timer interrupt when exiting STOP mode, it is recommended
to set the TIM bit prior entering STOP mode. After exiting STOP mode TIF bit can then be cleared.
The CPU clock halts during the WAIT mode, but the timer remains active. If the interrupts are
enabled, the timer interrupt will cause the processor to exit the WAIT mode.
Freescale
6-4
Address
$08
Timer Data Register (TDR)
Operation during Low Power Modes
bit 7
TD7
bit 6
TD6
PR2
0
0
0
0
1
1
1
1
bit 5
TD5
PR1
0
0
1
1
0
0
1
1
bit 4
TD4
TIMER
PR0
bit 3
TD3
0
1
0
1
0
1
0
1
bit 2
TD2
Divide Ratio
128
16
32
64
1
2
4
8
bit 1
TD1
bit 0
TD0
1111 1111
on reset
MC68HC05SR3
State
TPG