N80C196NT Intel, N80C196NT Datasheet - Page 6

• Manufacturer Part Number: N80C196NT
• Description: IC MPU 16-BIT 5V 20MHZ 68-PLCC
• Manufacturer: Intel
• Series: 80Cr

Specifications of N80C196NT

• Rohs Status: RoHS non-compliant
• Core Processor: MCS 96
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, SSIO
• Peripherals: WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 68-PLCC
• Eeprom Size: -
• Program Memory Size: -
• Other names: 804261

8XC196NT
PIN DESCRIPTIONS
6
P5 2 WR WRL SLPWR
P5 5 BHE WRH
P5 6 READY
P5 4 SLPINT
P6 2 T1CLK
P6 3 T1DIR
PORT1 EPA0 – 7
P6 0–6 1 EPA8– 9
PORT 0 ACH4 – 7
P6 3–6 7 SSIO
PORT 2
PORT 3 and 4
EPORT
INTOUT
SLP0 –SLP7
Symbol
(Continued)
Write and Write Low output to external memory as selected by the CCR WR
will go low for every external write while WRL will go low only for external
writes where an even byte is being written WR WRL is active during external
memory writes Also an LSIO pin when not used as WR WRL SLPWR is the
Slave Port Write Control Input
Byte High Enable or Write High output as selected by the CCR BHE
selects the bank of memory that is connected to the high byte of the data bus
A0
accesses to a 16-bit wide memory can be to the low byte only (A0
BHE
BHE
writing to an odd memory location BHE WRH is only valid during 16-bit
external memory read write cycles Also an LSIO pin when not BHE WRH
Ready input to lengthen external memory cycles for interfacing with slow or
dynamic memory or for bus sharing If the pin is high CPU operation continues
in a normal manner If the pin is low prior to the falling edge of CLKOUT the
memory controller goes into a wait state mode until the next positive transition
in CLKOUT occurs with READY high When external memory is not used
READY has no effect The max number of wait states inserted into the bus
cycle is controlled by the CCR CCR1 Also an LSIO pin when READY is not
selected
Dual function I O pin As a bidirectional port pin or as a system function The
system function is a Slave Port Interrupt Output Pin
Dual function I O pin Primary function is that of a bidirectional I O pin
however it may also be used as a TIMER1 Clock input The TIMER1 will
increment or decrement on both positive and negative edges of this pin
Dual function I O pin Primary function is that of a bidirectional I O pin
however it may also be used as a TIMER1 Direction input The TIMER1 will
increment when this pin is high and decrements when this pin is low
Dual function I O port pins Primary function is that of bidirectional I O System
function is that of High Speed capture and compare EPA0 and EPA2 have yet
another function of T2CLK and T2DIR of the TIMER2 timer counter
4-bit high impedance input-only port These pins can be used as digital inputs
and or as analog inputs to the on-chip A D converter These pins are also
used as inputs to OTPROM parts to select the Programming Mode
Dual function I O ports that have a system function as Synchronous Serial I O
Two pins are clocks and two pins are data providing full duplex capability
8-bit multi-functional port All of its pins are shared with other functions
8-bit bidirectional I O ports with open drain outputs These pins are shared
with the multiplexed address data bus which has strong internal pullups
8-bit bidirectional standard and I O port These bits are shared with the
extended address bus A16 – A19 Pin function is selected on a per pin basis
Interrupt Output This active-low output indicates that a pending interrupt
requires use of the external bus
Slave Port Address Data Bus
e
e
e
0 selects that bank of memory that is connected to the low byte Thus
1) to the high byte only (A0
0) If the WRH function is selected the pin will go low if the bus cycle is
Name and Function
e
1 BHE
e
0) or both bytes (A0
e
e
0
0
e
0