HD64F3672FPV Renesas Electronics America, HD64F3672FPV Datasheet - Page 152

IC H8/3672 MCU FLASH 64LQFP

HD64F3672FPV

Manufacturer Part Number
HD64F3672FPV
Description
IC H8/3672 MCU FLASH 64LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheets

Specifications of HD64F3672FPV

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
26
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3672FPV
Manufacturer:
MICROCHIP
Quantity:
1 000
Part Number:
HD64F3672FPV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
HD64F3672FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3672FPV
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 2 Instruction Descriptions
2.2.40 (3) NEG (L)
NEG (NEGate)
Operation
0 – ERd
Assembly-Language Format
NEG.L ERd
Operand Size
Longword
Description
This instruction takes the two’s complement of the contents of a 32-bit register ERd (destination
operand) and stores the result in the 32-bit register ERd (subtracting the register contents from
H'00000000). If the original contents of ERd was H'80000000, however, the result remains
H'80000000.
Available Registers
ERd: ER0 to ER7
Operand Format and Number of States Required for Execution
Notes
An overflow occurs if the previous contents of ERd was H'80000000.
Rev. 3.00 Dec 13, 2004 page 136 of 258
REJ09B0213-0300
Register direct
Addressing
Mode
ERd
Mnemonic
NEG.L
Operands
ERd
1st byte
1
7
Condition Code
H: Set to 1 if there is a borrow at bit 27;
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Set to 1 if an overflow occurs; otherwise
C: Set to 1 if there is a borrow at bit 31;
2nd byte
B
otherwise cleared to 0.
cleared to 0.
cleared to 0.
cleared to 0.
otherwise cleared to 0.
Instruction Format
— —
I
0 erd
UI
H
3rd byte
U
Negate Binary Signed
N
4th byte
Z
V
States
No. of
C
2

Related parts for HD64F3672FPV