HD64F3672FPV Renesas Electronics America, HD64F3672FPV Datasheet - Page 109

• Manufacturer Part Number: HD64F3672FPV
• Description: IC H8/3672 MCU FLASH 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3672FPV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• For Use With: R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

DIVXU
DIVXU Instruction, Zero Divide, and Overflow
Zero divide and overflow are not detected in the DIVXU instruction. A program like the following
can detect zero divisors and avoid overflow.
1. Programming solutions for DIVXU.B R0L, R1
Example 1: Divide upper 8 bits and lower 8 bits of 16-bit dividend separately and obtain 16-bit
quotient
ZERODIV:
DIVXU (DIVide eXtend as Unsigned)
CMP.B
BEQ
MOV.B
EXTU.W
DIVXU.B
MOV.B
DIVXU.B
MOV.B
MOV.B
RTS
#0, R0L
ZERODIV
R1H,R2L
R2 (*1).
R0L, R2 (*2)
R2H, R1H (*3) ;
R0L, R1 (*4)
R2L, R2H
R1L, R2L (*5) ;
;
;
;
;
;
;
;
;
R0L = 0? (Zero divisor?)
Branch to ZERODIV if R0L = 0
Divide upper 8 bits of dividend
R2H
Divide lower 8 bits of dividend (including repeated
division of upper 8 bits)
Store upper part of quotient in R2H
Store lower part of quotient in R2L
Zero-divide handling routine
Copy upper 8 bits of dividend to R2L and
zero-extend to 16 bits
R1H (store partial remainder in R1H)
Rev. 3.00 Dec 13, 2004 page 93 of 258
Section 2 Instruction Descriptions
REJ09B0213-0300
Divide