MC9S08RD32CDWE Freescale Semiconductor, MC9S08RD32CDWE Datasheet - Page 82

• Manufacturer Part Number: MC9S08RD32CDWE
• Description: IC MCU 32K FLASH 2K RAM 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08RD32CDWE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: S08RD
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08RG60E
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Parallel Input/Output
6.6.4
Port D pins used as general-purpose I/O pins are controlled by the port D data (PTDD), data direction
(PTDDD), and pullup enable (PTDPE) registers.
82
PTCDD[7:0]
PTDD[6:0]
Field
Field
7:0
6:0
Reset
Reset
W
W
R
R
Port D Registers (PTDD, PTDPE, and PTDDD)
Data Direction for Port C Bits — These read/write bits control the direction of port C pins and what is read for
PTCD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port C bit n and PTCD reads return the contents of PTCDn.
Port D Data Register Bits — For port D pins that are inputs, reads return the logic level on the pin. For port D
pins that are configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port D pins that are configured as outputs, the logic level is
driven out the corresponding MCU pin.
Reset forces PTDD to all 0s, but these 0s are not driven out the corresponding pins because reset also
configures all port pins as high-impedance inputs with pullups disabled.
PTCDD7
0
0
0
7
7
= Unimplemented or Reserved
PTCDD6
PTDD6
6
0
6
0
Figure 6-14. Data Direction for Port C (PTCDD)
Figure 6-15. Port D Data Register (PTDD)
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
Table 6-9. PTCDD Field Descriptions
Table 6-10. PTDD Field Descriptions
PTCDD5
PTDD5
0
0
5
5
PTCDD4
PTDD4
4
0
4
0
Description
Description
PTCDD3
PTDD3
0
0
3
3
PTCDD2
PTDD2
2
0
2
0
PTCDD1
Freescale Semiconductor
PTDD1
0
0
1
1
PTCDD0
PTDD0
0
0
0
0