P87C51RC2BN,112 NXP Semiconductors, P87C51RC2BN,112 Datasheet - Page 50

IC 80C51 MCU 512 RAM 40DIP

P87C51RC2BN,112

Manufacturer Part Number
P87C51RC2BN,112
Description
IC 80C51 MCU 512 RAM 40DIP
Manufacturer
NXP Semiconductors
Series
87Cr
Datasheet

Specifications of P87C51RC2BN,112

Core Processor
8051
Core Size
8-Bit
Speed
33MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.600", 15.24mm)
Cpu Family
87C
Device Core
80C51
Device Core Size
8b
Frequency (max)
33MHz
Interface Type
UART
Total Internal Ram Size
512Byte
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
40
Package Type
PDIP
Processor Series
P87C5x
Core
80C51
Data Bus Width
8 bit
Maximum Clock Frequency
16 MHz
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
0 C
For Use With
OM10064 - EMULATOR 80C51 PDS51-MK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Compliant
Other names
935272150112
P87C51RC2BN
P87C51RC2BN
Philips Semiconductors
EXPLANATION OF THE AC SYMBOLS
Each timing symbol has five characters. The first character is always
‘t’ (= time). The other characters, depending on their positions,
indicate the name of a signal or the logical status of that signal. The
designations are:
A – Address
C – Clock
D – Input data
H – Logic level high
I – Instruction (program memory contents)
L – Logic level low, or ALE
2003 Jan 24
PORT 0
PORT 2
80C51 8-bit microcontroller family
with 512B/1KB RAM, low voltage (2.7 to 5.5 V), low power, high
speed (30/33 MHz)
PSEN
ALE
RD
PORT 0
PORT 2
PSEN
ALE
t
AVLL
FROM RI OR DPL
A0–A7
t
LLAX
t
t
AVWL
LHLL
t
t
LLWL
AVLL
A0–A7
Figure 34. External Program Memory Read Cycle
8KB/16KB/32KB/64KB OTP
t
t
AVDV
P2.0–P2.7 OR A8–A15 FROM DPF
RLAZ
Figure 35. External Data Memory Read Cycle
t
LLDV
t
t
t
AVIV
LLAX
LLPL
t
LLIV
t
t
PLIV
RLDV
A0–A15
t
PLAZ
t
PLPH
t
RLRH
t
PXIX
INSTR IN
50
t
RHDX
DATA IN
P – PSEN
Q – Output data
R – RD signal
t – Time
V – Valid
W – WR signal
X – No longer a valid logic level
Z – Float
Examples: t
t
PXIZ
t
RHDZ
t
t
AVLL
WHLH
LLPL
P87C51RA2/RB2/RC2/RD2
= Time for address valid to ALE low.
=Time for ALE low to PSEN low.
A0–A7
A0–A7 FROM PCL
A0–A15 FROM PCH
A8–A15
SU00006
INSTR IN
Product data
SU00025

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