PIC16C67-04/PQ Microchip Technology, PIC16C67-04/PQ Datasheet - Page 308

IC MCU OTP 8KX14 PWM 44-MQFP

PIC16C67-04/PQ

Manufacturer Part Number
PIC16C67-04/PQ
Description
IC MCU OTP 8KX14 PWM 44-MQFP
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C67-04/PQ

Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Type
OTP
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
44-MQFP, 44-PQFP
Controller Family/series
PIC16C
No. Of I/o's
33
Ram Memory Size
368Byte
Cpu Speed
4MHz
No. Of Timers
3
No. Of Pwm Channels
2
Embedded Interface Type
I2C, SPI
Rohs Compliant
Yes
Processor Series
PIC16C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
33
Number Of Timers
3 bit
Operating Supply Voltage
2.5 V to 6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
309-1002 - ADAPTER 44-PQFP TO 40-DIP
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16C67-04/PQ
Manufacturer:
AIMTEC
Quantity:
2 000
Part Number:
PIC16C67-04/PQ
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC16C6X
APPENDIX C: WHAT’S NEW
Added PIC16CR63 and PIC16CR65 devices.
Added PIC16C66 and PIC16C67 devices. The
PIC16C66/67 devices have 368 bytes of data memory
distributed in 4 banks and 8K of program memory in 4
pages. These two devices have an enhanced SPI that
supports both clock phase and polarity. The USART
has been enhanced.
When upgrading to the PIC16C66/67 please note that
the upper 16 bytes of data memory in banks 1,2, and 3
are mapped into bank 0. This may require relocation of
data memory usage in the user application code.
Q-cycles for instruction execution were added to Sec-
tion 14.0 Instruction Set Summary.
DS30234D-page 308
APPENDIX D: WHAT’S CHANGED
Minor changes, spelling and grammatical changes.
Divided SPI section into SPI for the PIC16C66/67
(Section 11.3)
(Section 11.2).
Added the following note for the USART. This applies to
all devices except the PIC16C66 and PIC16C67.
For the PIC16C63/R63/65/65A/R65 the asynchronous
high speed mode (BRGH = 1) may experience a high
rate of receive errors. It is recommended that BRGH =
0. If you desire a higher baud rate than BRGH = 0 can
support, refer to the device errata for additional infor-
mation or use the PIC16C66/67.
and
SPI
1997 Microchip Technology Inc.
for
all
other
devices

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