ATMEGA8535-16PU Atmel, ATMEGA8535-16PU Datasheet - Page 109

• Manufacturer Part Number: ATMEGA8535-16PU
• Description: IC AVR MCU 8K 16MHZ 5V 40DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8535-16PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: ATMEGA8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• A/d Inputs: 8-Channel, 10-Bit
• Cpu Speed: 16 MIPS
• Eeprom Memory: 512 Bytes
• Input Output: 32
• Interface: SPI/TWI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 8K Bytes
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 4.5-5.5 V
• Controller Family/series: AVR MEGA
• No. Of I/o's: 32
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 512Byte
• Rohs Compliant: Yes
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16-bit Timer/Counter
Register Description
Timer/Counter1 Control
Register A – TCCR1A
2502G–AVR–04/05
Figure 52. Timer/Counter Timing Diagram, with Prescaler (f
• Bit 7:6 – COM1A1:0: Compare Output Mode for Channel A
• Bit 5:4 – COM1B1:0: Compare Output Mode for Channel B
The COM1A1:0 and COM1B1:0 control the Output Compare pins (OC1A and OC1B
respectively) behavior. If one or both of the COM1A1:0 bits are written to one, the OC1A
output overrides the normal port functionality of the I/O pin it is connected to. If one or
both of the COM1B1:0 bit are written to one, the OC1B output overrides the normal port
functionality of the I/O pin it is connected to. However, note that the Data Direction Reg-
ister (DDR) bit corresponding to the OC1A or OC1B pin must be set in order to enable
the output driver.
When the OC1A or OC1B is connected to the pin, the function of the COM1x1:0 bits is
dependent of the WGM13:0 bits setting. Table 45 shows the COM1x1:0 bit functionality
when the WGM13:0 bits are set to a normal or a CTC mode (non-PWM).
Table 45. Compare Output Mode, non-PWM
(PC and PFC PWM)
Bit
Read/Write
Initial Value
and ICFn
COM1A1/
COM1B1
(CTC and FPWM)
TOVn
(Update at TOP)
TCNTn
TCNTn
OCRnx
as TOP)
(clk
0
0
1
1
clk
clk
I/O
(FPWM)
I/O
Tn
/8)
(if used
COM1A1
R/W
COM1A0/
COM1B0
7
0
0
1
0
1
COM1A0
R/W
6
0
TOP - 1
TOP - 1
Description
Normal port operation, OC1A/OC1B disconnected.
Toggle OC1A/OC1B on Compare Match.
Clear OC1A/OC1B on Compare Match (set output to low level).
Set OC1A/OC1B on Compare Match (set output to high level).
Old OCRnx Value
COM1B1
R/W
5
0
COM1B0
R/W
4
0
TOP
TOP
FOC1A
W
3
0
FOC1B
W
ATmega8535(L)
2
0
BOTTOM
TOP - 1
clk_I/O
New OCRnx Value
WGM11
R/W
/8)
1
0
WGM10
R/W
BOTTOM + 1
0
0
TOP - 2
TCCR1A
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