PIC18F8390T-I/PT Microchip Technology, PIC18F8390T-I/PT Datasheet - Page 144

• Manufacturer Part Number: PIC18F8390T-I/PT
• Description: IC PIC MCU FLASH 4KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F8390T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
• Number Of I /o: 66
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SPI, I2C, EUSART, AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 66
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163028
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit
• For Use With: XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPDM163028 - BOARD DEMO PICDEM LCDAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F6390/6490/8390/8490
12.2
Timer2 also can generate an optional device interrupt.
The Timer2 output signal (TMR2 to PR2 match)
provides
counter/postscaler. This counter generates the TMR2
match interrupt flag which is latched in TMR2IF
(PIR1<1>). The interrupt is enabled by setting the
TMR2 Match Interrupt Enable bit, TMR2IE (PIE1<1>).
A range of 16 postscale options (from 1:1 through 1:16
inclusive) can be selected with the postscaler control
bits, T2OUTPS3:T2OUTPS0 (T2CON<6:3>).
FIGURE 12-1:
TABLE 12-1:
DS39629C-page 142
INTCON GIE/GIEH PEIE/GIEL
PIR1
PIE1
IPR1
TMR2
T2CON
PR2
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Timer2 module.
Name
T2OUTPS3:T2OUTPS0
T2CKPS1:T2CKPS0
F
OSC
Timer2 Interrupt
/4
Timer2 Register
Timer2 Period Register
the
Bit 7
—
—
—
—
REGISTERS ASSOCIATED WITH TIMER2 AS A TIMER/COUNTER
input
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0
TIMER2 BLOCK DIAGRAM
ADIE
ADIP
ADIF
Bit 6
1:1, 1:4, 1:16
Internal Data Bus
Prescaler
for
2
the
TMR0IE
RC1IF
RC1IE
RC1IP
Bit 5
4-bit
4
output
TMR2
INT0IE
TX1IE
TX1IP
TX1IF
Bit 4
Reset
8
SSPIF
SSPIE
SSPIP
RBIE
Bit 3
12.3
The unscaled output of TMR2 is available primarily to
the CCP modules, where it is used as a time base for
operations in PWM mode.
Timer2 can be optionally used as the shift clock source
for the MSSP module operating in SPI mode.
Additional information is provided in Section 15.0
“Master Synchronous Serial Port (MSSP) Module”.
Comparator
1:1 to 1:16
Postscaler
8
TMR2/PR2
Match
TMR2 Output
TMR0IF
CCP1IF
CCP1IE
CCP1IP
Bit 2
TMR2IE
TMR2IP
TMR2IF
INT0IF
Bit 1
© 2007 Microchip Technology Inc.
PR2
8
Set TMR2IF
TMR2 Output
(to PWM or MSSP)
TMR1IF
TMR1IE
TMR1IP
RBIF
Bit 0
on Page
Values
Reset
59
61
61
61
60
60
60