TINY88-15MZ Atmel, TINY88-15MZ Datasheet - Page 177

• Manufacturer Part Number: TINY88-15MZ
• Description: MCU AVR 8KB FLASH 12MHZ 32-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of TINY88-15MZ

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 28
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.13 Register Description
17.13.1
9157B–AVR–01/10
ADMUX – ADC Multiplexer Selection Register
• Bits 7,4 – Res: Reserved Bits
These bits are reserved and will always read zero.
• Bit 6 – REFS0: Reference Selection Bits
This bit select the voltage reference for the ADC, as shown in
during a conversion, the change will not go in effect until this conversion is complete (ADIF in
ADCSRA is set).
Table 17-3.
• Bit 5 – ADLAR: ADC Left Adjust Result
The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Register.
Write one to ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the
ADLAR bit will affect the ADC Data Register immediately, regardless of any ongoing conver-
sions. For a complete description of this bit, see
page
• Bits 3:0 – MUX3:0: Analog Channel Selection Bits
The value of these bits selects which analog inputs are connected to the ADC. Selecting the sin-
gle-ended channel ADC8 enables the temperature measurement. See
these bits are changed during a conversion, the change will not go in effect until this conversion
is complete (ADIF in ADCSRA is set).
Table 17-4.
Bit
Read/Write
Initial Value
REFS0
0
1
179.
Voltage Reference Selection
Internal 1.1V Voltage Reference
AV
MUX3..0
0000
0001
0010
0011
0100
0101
0110
0111
Voltage Reference Selections for ADC
Input Channel Selections
CC
R
7
–
0
Reference
REFS0
R/W
6
0
ADLAR
Single Ended Input
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
R/W
5
0
R
4
–
0
“ADCL and ADCH – The ADC Data Register” on
MUX3
R/W
3
0
ATtiny88 Automotive
MUX2
R/W
2
0
Table
17-3. If this bit is changed
MUX1
R/W
1
0
Table 17-4
MUX0
R/W
0
0
for details. If
ADMUX
177