PIC12CE519-04/P Microchip Technology, PIC12CE519-04/P Datasheet - Page 205

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PIC12CE519-04/P

Manufacturer Part Number
PIC12CE519-04/P
Description
IC MCU OTP 1KX12 W/EE 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr

Specifications of PIC12CE519-04/P

Program Memory Type
OTP
Program Memory Size
1.5KB (1K x 12)
Package / Case
8-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Eeprom Size
16 x 8
Ram Size
41 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Processor Series
PIC12C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
41 B
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
5
Number Of Timers
1
Operating Supply Voltage
3 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGDVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICEAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12CE519-04/P
Manufacturer:
Microchip
Quantity:
710
Part Number:
PIC12CE519-04/P
Manufacturer:
MIC
Quantity:
20 000
14.2
1997 Microchip Technology Inc.
Control Register
bit 7:6
bit 5:4
bit 3:0
Register 14-1: CCPxCON Register
bit 7
Unimplemented: Read as '0'
DCxB1:DCxB0: PWM Duty Cycle bit1 and bit0
Capture Mode:
Compare Mode:
PWM Mode:
CCPxM3:CCPxM0: CCPx Mode Select bits
0000 = Capture/Compare/PWM off (resets CCPx module)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode,
1001 = Compare mode,
1010 = Compare mode,
1011 = Compare mode,
11xx = PWM mode
Legend
R = Readable bit
U = Unimplemented bit, read as ‘0’
U-0
Unused
Unused
These bits are the two LSbs (bit1 and bit0) of the 10-bit PWM duty cycle. The upper eight
bits (DCx9:DCx2) of the duty cycle are found in CCPRxL.
Initialize CCP pin Low, on compare match force CCP pin High (CCPIF bit is set)
Initialize CCP pin High, on compare match force CCP pin Low (CCPIF bit is set)
Generate software interrupt on compare match
(CCPIF bit is set, CCP pin is unaffected)
Trigger special event (CCPIF bit is set)
U-0
W = Writable bit
DCxB1
R/W-0
DCxB0
R/W-0
- n = Value at POR reset
CCPxM3 CCPxM2 CCPxM1
Section 14. CCP
R/W-0
R/W-0
R/W-0
DS31014A-page 14-3
bit 0
CCPxM0
R/W-0
14

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