MC9S12C32MFUE25 Freescale Semiconductor, MC9S12C32MFUE25 Datasheet - Page 453

• Manufacturer Part Number: MC9S12C32MFUE25
• Description: IC MCU 32K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12C32MFUE25

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-QFP
• Processor Series: S12C
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: CAN/SCI/SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 8
• Operating Supply Voltage: 3.3 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912C32EE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• For Use With: CML12C32SLK - KIT STUDENT LEARNING 16BIT HCS12
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Module Base + 0x0010 = TC0H
Module Base + 0x0011 = TC0L
15.3.2.14 Timer Input Capture/Output Compare Registers High and Low 0–7
Depending on the TIOS bit for the corresponding channel, these registers are used to latch the value of the
free-running counter when a defined transition is sensed by the corresponding input capture edge detector
or to trigger an output action for output compare.
Read: Anytime
Write: Anytime for output compare function.Writes to these registers have no meaning or effect during
input capture. All timer input capture/output compare registers are reset to 0x0000.
Freescale Semiconductor
Reset
Reset
W
R
W
R
0x0012 = TC1H
0x0014 = TC2H
0x0016 = TC3H
0x0013 = TC1L
0x0015 = TC2L
0x0017 = TC3L
(TCxH and TCxL)
Figure 15-22. Timer Input Capture/Output Compare Register x High (TCxH)
Read/Write access in byte mode for high byte should takes place before low
byte otherwise it will give a different result.
Bit 15
Figure 15-23. Timer Input Capture/Output Compare Register x Low (TCxL)
15
Bit 7
0
0
7
Bit 14
14
Bit 6
0
0
6
0x0018 = TC4H
0x001A = TC5H
0x001C = TC6H
0x001E = TC7H
MC9S12C-Family / MC9S12GC-Family
0x0019 = TC4L
0x001B = TC5L
0x001D = TC6L
0x001F = TC7L
Bit 13
13
Bit 5
0
0
5
Rev 01.24
NOTE
Bit 12
12
Bit 4
0
0
4
Chapter 15 Timer Module (TIM16B8CV1) Block Description
Bit 11
11
Bit 3
0
0
3
Bit 10
10
Bit 2
0
0
2
Bit 9
Bit 1
0
9
0
1
Bit 8
Bit 0
0
0
0
0
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