PIC12F675-E/SN Microchip Technology, PIC12F675-E/SN Datasheet - Page 7

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PIC12F675-E/SN

Manufacturer Part Number
PIC12F675-E/SN
Description
IC MCU CMOS 1K FLASH W/AD 8-SOIC
Manufacturer
Microchip Technology
Series
PIC® 12Fr

Specifications of PIC12F675-E/SN

Program Memory Type
FLASH
Program Memory Size
1.75KB (1K x 14)
Package / Case
8-SOIC (3.9mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
5
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
RS- 232/USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 53270-913
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
On-chip Adc
4-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Part Number:
PIC12F675-E/SN
0
2.3.1.3
After receiving this command, the chip will load in a
14-bit data word when 16 cycles are applied. However,
the data memory is only 8 bits wide and thus, only the
first 8 bits of data after the Start bit will be programmed
into the data memory. It is still necessary to cycle the
clock the full 16 cycles in order to allow the internal
circuitry to reset properly. The data memory contains
128 bytes. Only the lower 8 bits of the PC are decoded
by the data memory and therefore, if the PC is greater
than 0x7F, it will wrap around and address a location
within the physically implemented memory.
FIGURE 2-5:
2.3.1.4
After receiving this command, the chip will transmit
data bits out of the program memory (user or
configuration) currently accessed, starting with the
second rising edge of the clock input. The data pin will
go into Output mode on the second rising clock edge
and revert to Input mode (high-impedance) after the
16th rising edge.
FIGURE 2-6:
© 2005 Microchip Technology Inc.
CLOCK
CLOCK
GP0
GP0
GP1
GP1
DATA
DATA
Note 1: GP0 and GP1 apply to PIC12F629/675 only. For PIC16F630/676, use RA0 and RA1, respectively.
Note 1: GP0 and GP1 apply to PIC12F629/675 only. For PIC16F630/676, use RA0 and RA1, respectively.
(1)
(1)
(1)
(1)
Load Data For Data Memory
Read Data From Program Memory
1
1
1
0
T
LOAD DATA FOR DATA MEMORY COMMAND
READ DATA FROM PROGRAM MEMORY COMMAND
SET
2
2
1
0
1
3
3
0
1
Input
Input
T
HLD
4
4
0
PIC12F629/675/PIC16F630/676
0
1
5
5
x
x
x
x
6
6
T
T
T
T
DLY
DLY
DLY
DLY
2
2
1
1
strt_bit
strt_bit
1
1
If the program memory is code-protected (CP = 0), the
data is read as zeros.
2
2
LSb
LSb
T
T
DLY
DLY
3
3
3
3
4
4
Output
Output
5
5
15
15
DS41191D-page 7
MSb
MSb
16
16
Input
Input
stp_bit
stp_bit

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