ST7FLITE19F1M6 STMicroelectronics, ST7FLITE19F1M6 Datasheet - Page 59

IC MCU 8BIT 4K 20-SOIC

ST7FLITE19F1M6

Manufacturer Part Number
ST7FLITE19F1M6
Description
IC MCU 8BIT 4K 20-SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FLITE19F1M6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
ST7FLITE1x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
15
Number Of Timers
1 x 12 bit / 2 x 8 bit
Operating Supply Voltage
2.4 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLIT2-COS/COM, ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
7 bit x 10 bit
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5049 - KIT STARTER RAISONANCE ST7FLITE497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-2133-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST7FLITE19F1M6
Manufacturer:
ST
0
Company:
Part Number:
ST7FLITE19F1M6
Quantity:
1 260
Part Number:
ST7FLITE19F1M6TR
Manufacturer:
ST
0
12-BIT AUTORELOAD TIMER (Cont’d)
11.2.4 Low Power Modes
11.2.5 Interrupts
Note 1: The CMP and IC events are connected to
the same interrupt vector.
Mode
SLOW
WAIT
ACTIVE-HALT
HALT
Overflow
Event
IC Event
CMP Event
Interrupt
Event
1)
CMPF0 CMPIE
Event
Flag
OVF
ICF
Description
The input frequency is divided
by 32
No effect on AT timer
AT timer halted except if CK0=1,
CK1=0 and OVFIE=1
AT timer halted
Control
Enable
OVIE
ICIE
Bit
from
Wait
Exit
Yes
Yes
Yes
from
Exit
Halt
No
No
No
Active-
Yes
from
Exit
Halt
No
No
2)
The OVF event is mapped on a separate vector
(see Interrupts chapter).
They generate an interrupt if the enable bit is set in
the ATCSR register and the interrupt mask in the
CC register is reset (RIM instruction).
Note 2: Only if CK0=1 and CK1=0 (f
f
LTIMER
)
COUNTER
ST7LITE1
59/131
=
1

Related parts for ST7FLITE19F1M6