ATMEGA406-1AAU Atmel, ATMEGA406-1AAU Datasheet - Page 17

• Manufacturer Part Number: ATMEGA406-1AAU
• Description: IC AVR MCU 40K 1MHZ 48LQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA406-1AAU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 1MHz
• Connectivity: I²C
• Peripherals: POR, WDT
• Number Of I /o: 18
• Program Memory Size: 40KB (20K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 25 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -30°C ~ 85°C
• Package / Case: 48-LQFP
• Processor Series: ATMEGA48x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: 2-Wire
• Maximum Clock Frequency: 1 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 30 C
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 1MHz
• Total Internal Ram Size: 2KB
• # I/os (max): 18
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5/9/12/15/18/24V
• Operating Supply Voltage (max): 25V
• Operating Supply Voltage (min): 4V
• On-chip Adc: 10-chx12-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -30C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Controller Family/series: AVR MEGA
• No. Of I/o's: 18
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 2KB
• Cpu Speed: 1MHz
• Rohs Compliant: Yes
• For Use With: 770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8. Errata
8.1
2548ES–AVR–07/06
Rev. F
•
•
1. Voltage-ADC Common Mode Offset
Voltage-ADC Common Mode Offset
Voltage Reference Spike
The cell conversion will have an Offset-error depending on the Common Mode (CM) level.
This means that the error of a cell is depending on the voltage of the lower cells. The CM
Offset is calibrated away in Atmel production when the cells are balanced. When the cells
get un-balanced the CM depending offset will reappear:
a. Cell 1 defines its own CM level, and will never be affected by the CM dependent
b. The CM level for Cell 2 will change if Cell 1 voltage deviates from Cell 2 voltage.
c. The CM level for Cell 3 will change if Cell 1 and/or Cell 2 voltage deviates from the
d. The CM level for Cell 4 will change if Cell 1, Cell 2 and/or Cell 3 deviate from the volt-
Figure 9-1 on page
anced cells.
offset.
voltage at Cell 3. The worst-case error is when Cell 1 and 2 are balanced while Cell 3
voltage deviates from the voltage at Cell 1 and 2.
age at Cell 4. The worst-case error is when Cell 1, Cell 2 and Cell 3 are balanced
while Cell 4 voltage deviates from the voltage at Cell 1, 2 and 3.
18, shows the error of Cell2, Cell3 and Cell4 with 5% and 10% unbal-
ATmega406
17