PIC18F448-I/PT Microchip Technology, PIC18F448-I/PT Datasheet - Page 3

• Manufacturer Part Number: PIC18F448-I/PT
• Description: IC PIC MCU FLASH 8KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F448-I/PT

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC18
• No. Of I/o's: 33
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SPI, I2C, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136, DM163011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
• Lead Free Status / Rohs Status: Details

7. Module: A/D (External Voltage Reference)
8. Module: CAN
© 2006 Microchip Technology Inc.
When the external voltage reference, V
selected for use with either the A/D or comparator
voltage reference, AV
the comparator module. If V
than AV
excessive current will flow into the V
Work around
If external V
0V, enable the comparator voltage reference by
setting the CVREN bit in the CVRCON register.
This disconnects V
comparator module.
CAN Disable mode change request is not
confirmed. A CAN Disable mode request by writing
‘001’ to the REQOP bits (CANCON<7:5>) immedi-
ately changes the OPMODE bits (CANSTAT<7:5>),
implying that Disable mode is accepted. This occurs
even though the CAN module itself may not have
switched its state.
Work around
Switch to Configuration mode instead. Wake-up
from CAN bus activity will continue to work even in
Configuration mode.
SS
and Comparator Voltage
Reference
(which must be tied externally to V
REF
- is used with a voltage other than
REF
SS
- and AV
is connected to V
REF
- is a voltage other
SS
REF
within the
- pin.
REF
REF
-, is
SS
- in
),
9. Module: MSSP (All I
The Buffer Full (BF) flag bit of the SSPSTAT regis-
ter (SSPSTAT<0>) may be inadvertently cleared
even when the SSPBUF register has not been
read. This will occur only when the following two
conditions occur simultaneously:
• The four Least Significant bits of the BSR
• Any instruction that contains C9h in its 8 Least
Work around
All work arounds will involve setting the contents of
BSR<3:0> to some value other than 0Fh.
In addition to those proposed below, other
solutions may exist.
1. When developing or modifying code, keep
2. If accessing a part of Bank 15 is required and
3. If pointing the BSR to Bank 15 is unavoidable,
Date Codes that pertain to this issue:
All engineering and production devices.
register are equal to 0Fh (BSR<3:0> = 1111)
and
Significant bits (i.e., register file addresses,
literal data, address offsets, etc.) is executed.
these guidelines in mind:
• Assign 12-bit addresses to all variables.
• Do not set the BSR to point to Bank 15
• Allow the assembler to manipulate the
the use of Access Banking is not possible,
consider using Indirect Addressing mode.
review the absolute file listing. Verify that no
instructions contain C9h in the 8 Least
Significant bits while the BSR points to Bank 15
(BSR = 0Fh).
This allows the assembler to know when
Access Banking can be used.
(BSR = 0Fh).
access bit present in most instructions.
Accessing the SFRs in Bank 15 will be done
through the Access Bank. Continue to use
the BSR to select all GPR Banks.
PIC18FXX8
2
C™ and SPI™ Modes)
DS80134H-page 3