PIC18F448-I/PT Microchip Technology, PIC18F448-I/PT Datasheet - Page 2

• Manufacturer Part Number: PIC18F448-I/PT
• Description: IC PIC MCU FLASH 8KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F448-I/PT

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC18
• No. Of I/o's: 33
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SPI, I2C, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136, DM163011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
• Lead Free Status / Rohs Status: Details

PIC18FXX8
3. Module: Core (Program Memory Space)
4. Module: Core (Program Memory Space)
DS80134H-page 2
Note:
Performing table read operations above the user
program
1FFFFFh) may yield erroneous results at the
extreme low end of the device’s rated temperature
range (-40°C).
This applies specifically to addresses above
1FFFFFh,
(200000h-200007h),
(300000h-30000Dh) and the device ID locations
(3FFFFEh and 3FFFFFh). User program memory
is unaffected.
Work around
Two possible work arounds are presented. Other
solutions may exist.
1. Do not perform table read operations on areas
2. Insert NOP instructions (specifically, literal
Date Codes that pertain to this issue::
All engineering and production devices.
Under certain conditions, the execution of a table
read instruction may yield erroneous results. This
has been observed when a table read instruction
and its read destination, as indicated by the Table
Pointer registers, are on opposite sides of the
4000h program memory address boundary.
This behavior has not been observed when the
instruction and its target both occur strictly within
the same half of the program memory space.
Work around
Insert a data word of value FFFFh immediately
following any table read instruction. This behaves
as a NOP instruction when executed. Using the
actual NOP instruction instead of a literal FFFFh
may not have the same results.
This is a recommended solution. Others solutions
may exist.
Date Codes that pertain to this issue:
All engineering and production devices.
above the user memory space at -40°C.
FFFFh) around any table read instructions.
The suggested optimal number is 4 instruc-
tions before and 8 instructions after each table
read. This may vary depending upon the
particular application and should be optimized
by the user.
This issue applies only to PIC18F258 and
PIC18F458 devices with 32 Kbytes of
Flash program memory. PIC18F248 and
PIC18F448 devices are not affected.
memory
including
space
the
the
configuration
user
(addresses
ID
locations
bytes
over
5. Module: Core (Program Memory Space)
6. Module: Data EEPROM
Note:
Under certain conditions, the execution of some
control operations may yield unexpected results.
This has been observed when the following
instructions vector code execution across the
4000h program memory address boundary:
• CALL
• GOTO
• RETURN
• RETLW
• RETFIE
There are no known issues related to any of these
instructions when execution occurs strictly above
or below the 4000h address boundary.
Work around
Two possible solutions are presented. Other solu-
tions may exist. It is recommended to implement
either, or both, as needed.
1. Insert a data word of value FFFFh as the first
2. Insert a data word of value FFFFh immediately
In either case, the literal data behaves as a NOP
instruction when executed. Using the actual NOP
instruction instead of a literal FFFFh may not have
the same results.
Date Codes that pertain to this issue:
All engineering and production devices.
When reading the data EEPROM, the contents of
the EEDATA register may be corrupted if the RD
bit (EECON1<0>) is set immediately following a
write to the address byte (EEADR). The actual
contents of the data EEPROM remain unaffected.
Work around
Do not set EEADR immediately before the
execution of a read. Write to EEADR at least one
instruction cycle before setting the RD bit. The
instruction between the write to EEADR and the
read can be any valid instruction, including a NOP.
Date Codes that pertain to this issue:
All engineering and production devices.
instruction in the destination of a CALL or
GOTO.
following any RETURN, RETLW or RETFIE
instruction.
This issue applies only to PIC18F258
and PIC18F458 devices with 32 Kbytes of
Flash program memory. PIC18F248 and
PIC18F448 devices are not affected.
© 2006 Microchip Technology Inc.