PIC18F452-I/P Microchip Technology, PIC18F452-I/P Datasheet - Page 28

• Manufacturer Part Number: PIC18F452-I/P
• Description: IC MCU FLASH 16KX16 EE 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F452-I/P

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 34
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: MSSP/SPI/I2C/PSP/USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Package: 40PDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: PIC18F452I/P; Q1176145

PIC18FXX2/XX8
TABLE 5-3:
5.4
To allow portability of code, a PIC18FXX2/XX8 pro-
grammer is required to read the configuration word
locations from the HEX file. If configuration word infor-
mation is not present in the HEX file, then a simple
warning message should be issued. Similarly, while
saving a HEX file, all configuration word information
must be included. An option to not include the configu-
ration word information may be provided. When
embedding configuration word information in the HEX
file, it should start at address 300000h.
Microchip Technology Inc. feels strongly that this
feature is important for the benefit of the end customer.
DS39576C-page 28
EBTR0
EBTR1
EBTR2
EBTR3
EBTRB
DEV10:DEV3
DEV2:DEV0
REV4:REV0
Note 1: This bit only applies to the PIC18FXX2 devices.
Bit Name
(2)
(2)
Embedding Configuration Word
Information in the HEX File
2: These bits only apply to the PIC18FX52/X58 devices.
PIC18FXX2/XX8 BIT DESCRIPTION (CONTINUED)
Configuration
CONFIG7H
CONFIG7L
CONFIG7L
CONFIG7L
CONFIG7L
DEVID2
DEVID1
DEVID1
Words
Table Read Protection bit (code memory area 0200h - 01FFFh)
1 = Code memory not protected from table reads executed in other blocks
0 = Code memory protected from table reads executed in other blocks
Table Read Protection bit (code memory area 2000h - 3FFFh)
1 = Code memory not protected from table reads executed in other blocks
0 = Code memory protected from table reads executed in other blocks
Table Read Protection bit (code memory area 4000h - 5FFFh)
1 = Code memory not protected from table reads executed in other blocks
0 = Code memory protected from table reads executed in other blocks
Table Read Protection bit (code memory area 6000h - 7FFFh)
1 = Code memory not protected from table reads executed in other blocks
0 = Code memory protected from table reads executed in other blocks
Table Read Protection bit (boot block, memory area 0000h - 01FFh)
1 = Boot block not protected from table reads executed in other blocks
0 = Boot block protected from table reads executed in other blocks
Device ID bits
These bits are used with the DEV2:DEV0 bits in the DEVID1 register to
identify part number.
Device ID bits
These bits are used with the DEV10:DEV3 bits in the DEVID2 register to
identify part number.
These bits are used to indicate the revision of the device.
5.5
The checksum is calculated by summing the following:
• The contents of all code memory locations
• The configuration word, appropriately masked
• ID locations
The Least Significant 16-bits of this sum are the
checksum.
Table 5-4 describes how to calculate the checksum for
each device.
Note 1: The checksum calculation differs depend-
Description
Checksum Computation
ing on the code protect setting. Since the
code memory locations read out differently
depending on the code protect setting, the
table describes how to manipulate the
actual code memory values to simulate the
values that would be read from a protected
device. When calculating a checksum by
reading a device, the entire code memory
can simply be read and summed. The con-
figuration word and ID locations can
always be read.
 2010 Microchip Technology Inc.