PIC18F2620-I/SP Microchip Technology, PIC18F2620-I/SP Datasheet - Page 358

• Manufacturer Part Number: PIC18F2620-I/SP
• Description: IC MCU FLASH 32KX16 28-DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2620-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 64KB (32K x 16)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3986 B
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit
• Package: 28SPDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: I3DB18F4620 - BOARD DAUGHTER ICEPIC3DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2525/2620/4525/4620
FIGURE 26-19:
TABLE 26-20: MASTER SSP I
FIGURE 26-20:
DS39626B-page 356
90
91
92
93
Note 1: Maximum pin capacitance = 10 pF for all I
Param.
SCL
SDA
Note:
No.
T
T
T
T
Refer to Figure 26-5 for load conditions.
Symbol
SU
SU
HD
HD
:
:
:
:
STA
STO
SDA
Out
STA
STO
SDA
In
Note:
SCL
Start Condition
Setup Time
Start Condition
Hold Time
Stop Condition
Setup Time
Stop Condition
Hold Time
90
Refer to Figure 26-5 for load conditions.
Condition
MASTER SSP I
MASTER SSP I
Start
90
103
Characteristic
91
91
2
109
C™ BUS START/STOP BITS REQUIREMENTS
2
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
2
1 MHz mode
C™ BUS START/STOP BITS TIMING WAVEFORMS
C™ BUS DATA TIMING
100
Preliminary
106
2
(1)
(1)
(1)
C pins.
(1)
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
101
109
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
Min
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
107
Max
—
—
—
—
—
—
—
—
—
—
—
—
92
 2004 Microchip Technology Inc.
92
Units
Condition
Stop
ns
ns
ns
ns
102
110
Repeated Start
condition
After this period, the
first clock pulse is
generated
Only relevant for
93
Conditions