AT90PWM3B-16SU Atmel, AT90PWM3B-16SU Datasheet - Page 95

• Manufacturer Part Number: AT90PWM3B-16SU
• Description: IC MCU AVR RISC 8K FLASH 32-SOIC
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM3B-16SU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 27
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-SOIC (7.5mm Width)
• Processor Series: AT90PWMx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI/USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 27
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• On-chip Dac: 1-chx10-bit
• Controller Family/series: AVR PWM
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRMC200 - KIT EVAL FOR AT90PWM3 ASYNCATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK520 - ADAPTER KIT FOR 90PWM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.8
14.8.1
4317J–AVR–08/10
8-bit Timer/Counter Register Description
Timer/Counter Control Register A – TCCR0A
Figure 14-9. Timer/Counter Timing Diagram, with Prescaler (f
Figure 14-10
mode and PWM mode, where OCR0A is TOP.
Figure 14-10. Timer/Counter Timing Diagram, Setting of OCF0x, with Prescaler (f
Figure 14-11
PWM mode where OCR0A is TOP.
Figure 14-11. Timer/Counter Timing Diagram, Clear Timer on Compare Match mode, with Pres-
Bit
Read/Write
Initial Value
TCNTn
TCNTn
TCNTn
(clk
(clk
(clk
OCRnx
OCRnx
TOVn
OCFnx
(CTC)
OCFnx
clk
clk
clk
clk
clk
clk
I/O
I/O
I/O
I/O
Tn
I/O
Tn
I/O
Tn
/8)
/8)
/8)
shows the setting of OCF0B in all modes and OCF0A in all modes except CTC
shows the setting of OCF0A and the clearing of TCNT0 in CTC mode and fast
caler (f
COM0A1
R/W
7
0
clk_I/O
OCRnx - 1
COM0A0
MAX - 1
TOP - 1
R/W
/8)
6
0
COM0B1
R/W
5
0
COM0B0
OCRnx
R/W
MAX
TOP
4
0
OCRnx Value
TOP
R
3
–
0
AT90PWM2/3/2B/3B
OCRnx + 1
BOTTOM
BOTTOM
clk_I/O
R
2
–
0
/8)
WGM01
R/W
1
0
BOTTOM + 1
BOTTOM + 1
WGM00
OCRnx + 2
R/W
0
0
clk_I/O
/8)
TCCR0A
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