AT89S51-24JU Atmel, AT89S51-24JU Datasheet - Page 20

IC MCU 4K FLASH 24MHZ 44-PLCC

AT89S51-24JU

Manufacturer Part Number
AT89S51-24JU
Description
IC MCU 4K FLASH 24MHZ 44-PLCC
Manufacturer
Atmel
Series
89Sr
Datasheet

Specifications of AT89S51-24JU

Core Processor
8051
Core Size
8-Bit
Speed
24MHz
Connectivity
UART/USART
Peripherals
WDT
Number Of I /o
32
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
UART
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
32
Number Of Timers
2
Operating Supply Voltage
4 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89ISP
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

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20. Serial Programming Instruction Set
Note:
After Reset signal is high, SCK should be low for at least 64 system clocks before it goes high to clock in the enable data
bytes. No pulsing of Reset signal is necessary. SCK should be no faster than 1/16 of the system clock at XTAL1.
For Page Read/Write, the data always starts from byte 0 to 255. After the command byte and upper address byte are
latched, each byte thereafter is treated as data until all 256 bytes are shifted in/out. Then the next instruction will be ready
to be decoded.
20
Instruction
Programming Enable
Chip Erase
Read Program Memory
(Byte Mode)
Write Program Memory
(Byte Mode)
Write Lock Bits
Read Lock Bits
Read Signature Bytes
Read Program Memory
(Page Mode)
Write Program Memory
(Page Mode)
1. B1 = 0, B2 = 0
AT89S51
B1 = 0, B2 = 1
B1 = 1, B2 = 0
B1 = 1, B2 = 1
(1)
Byte 1
1010 1100
1010 1100
0010 0000
0100 0000
1010 1100
0010 0100
0010 1000
0011 0000
0101 0000
Mode 1, no lock protection
Mode 2, lock bit 1 activated
Mode 3, lock bit 2 activated
Mode 4, lock bit 3 activated
Byte 2
0101 0011
100x xxxx
xxxx
xxxx
1110 00
xxxx xxxx
xxxx
xxxx
xxxx
Instruction Format
}
Byte 3
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
Byte 0
Byte 0
xxx xxx0
Each of the lock bit modes need to be activated sequentially be-
fore Mode 4 can be executed.
Byte 4
xxxx xxxx
0110 1001
(Output on
MISO)
xxxx xxxx
xxxx xxxx
xxx
Signature Byte
Byte 1...
Byte 255
Byte 1...
Byte 255
xx
Operation
Enable Serial Programming
while RST is high
Chip Erase Flash memory
array
Read data from Program
memory in the byte mode
Write data to Program
memory in the byte mode
Write Lock bits. See Note (1).
Read back current status of
the lock bits (a programmed
lock bit reads back as a “1”)
Read Signature Byte
Read data from Program
memory in the Page Mode
(256 bytes)
Write data to Program
memory in the Page Mode
(256 bytes)
2487D–MICRO–6/08

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