pca9514a NXP Semiconductors, pca9514a Datasheet
pca9514a
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pca9514a Summary of contents
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... The current source is high-impedance whenever the pin voltage is greater than the part V The PCA9513A and PCA9514A rise time accelerator threshold is 0 provide better noise margin over the PCA9511A which is set to 0.6 V. Remark: The dynamic offset design of the PCA9510A/11A/12A/13A/14A I/O drivers allow them to be connected to another PCA9510A/11A/12A/13A/14A device in series or in parallel and to the A side of the PCA9517 ...
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... PA9514A SO8 PCA9513ADP 9513A TSSOP8 PCA9514ADP 9514A TSSOP8 [1] Also known as MSOP8. PCA9513A_PCA9514A_4 Product data sheet PCA9513A; PCA9514A Hot swappable I PCA9510A PCA9511A PCA9512A PCA9513A PCA9514A yes = 0 V yes yes - in only - Description plastic small outline package; 8 leads; body width 3.9 mm plastic small outline package; 8 leads; body width 3.9 mm [1] plastic thin shrink small outline package ...
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... SLEW RATE DETECTOR BACKPLANE-TO-CARD CONNECTION CONNECT STOP BIT AND BUS IDLE 0 100 s DELAY 0.5 pF Rev. 04 — 18 August 2009 PCA9513A; PCA9514A 2 C-bus and SMBus bus buffer 2 mA SLEW RATE DETECTOR CONNECT 2 mA SLEW RATE DETECTOR CONNECT 0.55V 0.45V CONNECT UVLO ...
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... NXP Semiconductors PCA9514A SDAIN SCLIN 0.55V / CC 0.45V CC UVLO ENABLE Fig 2. Block diagram of PCA9514A PCA9513A_PCA9514A_4 Product data sheet Hot swappable SLEW RATE DETECTOR BACKPLANE-TO-CARD CONNECTION CONNECT 2 mA SLEW RATE DETECTOR BACKPLANE-TO-CARD CONNECTION CONNECT STOP BIT AND BUS IDLE 0 ...
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... SDA bus on the card 8 power supply Figure 1 “Block diagram of PCA9513A” ) and remaining HIGH when all the SDAn and SCLn pins have been en Rev. 04 — 18 August 2009 PCA9513A; PCA9514A 2 Hot swappable I C-bus and SMBus bus buffer ENABLE 1 SCLOUT ...
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... RC time constant. As long as the slew rate is at least 1. when the pin voltage exceeds 0.8 V for the PCA9513A and PCA9514A, the rise time accelerators’ circuits are turned on and the pull-down driver is turned off. ...
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... If this were the SCL line, the parts on buffer A and buffer C would see a false clock rather than a stretched clock, which would cause a system error. The PCA9513A and PCA9514A rise time accelerator threshold is 0 there is 0.2 V more noise margin. ...
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... Rise time accelerators During positive bus transitions current source is switched on to quickly slew the SDA and SCL lines HIGH once the input level of 0.8 V for the PCA9513A and PCA9514A are exceeded. The rising edge rate should be at least 1. guarantee turn on of the accelerators ...
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... NXP Semiconductors rise time = 300 ns 20 rise time = (1) Unshaded area indicates recommended pull-up, for rise time < 300 ns, with PCA9513A/PCA9514A. (2) Rise time without PCA9513A/PCA9514A. Fig 6. Bus requirements for 3.3 V systems (1) Unshaded area indicates recommended pull-up, for rise time < 300 ns, with PCA9513A/PCA9514A. ...
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... BD_SEL SDA SCL Remark: The PCA9514A can be used in any combination depending on the number of rise time accelerators that are needed by the system. Normally only one PCA9514A would be required per bus. Fig 8. Hot swapping multiple I/O cards into a backplane using the PCA9514A in a cPCI, VME, and AdvancedTCA ...
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... CONNECTOR BACKPLANE V CC BD_SEL SDA SCL Fig 9. Hot swapping multiple I/O cards into a backplane using the PCA9513A in a cPCI, VME, and AdvancedTCA system PCA9513A_PCA9514A_4 Product data sheet PCA9513A; PCA9514A Hot swappable I I/O PERIPHERAL CARD 1 POWER SUPPLY HOT SWAP ENABLE SDAOUT SDAIN ...
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... NXP Semiconductors BACKPLANE CONNECTOR BACKPLANE SDA SCL Fig 10. Hot swapping multiple I/O cards into a backplane using the PCA9514A in a PCI system Fig 11. System with disparate V PCA9513A_PCA9514A_4 Product data sheet ENABLE SDAIN SCLIN C2 0.01 F ENABLE SDAIN SCLIN C4 0. drop ...
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... NXP Semiconductors 9. Application design-in information Fig 12. Typical application of PCA9513A Fig 13. Typical application of PCA9514A PCA9513A_PCA9514A_4 Product data sheet PCA9513A; PCA9514A Hot swappable (2 5 SCLIN 6 SDAIN 1 ENABLE ENABLE GND SCLIN 6 SDAIN 1 ENABLE ENABLE GND Rev. 04 — ...
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... LZ(READY) pin READY C input capacitance on pin i(ENABLE) ENABLE C output capacitance on pin o(READY) READY V LOW-level output voltage on OL(READY) pin READY PCA9513A_PCA9514A_4 Product data sheet PCA9513A; PCA9514A Hot swappable I Conditions 10 s max. Conditions [ SDAIN SCLIN all other ...
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... SCL signals [1] This specification applies over the full operating temperature range. [2] The enable time can slow considerably for some parts when temperature is < PCA9513A_PCA9514A_4 Product data sheet PCA9513A; PCA9514A Hot swappable I Conditions [5][6] positive transition on SDA, SCL 2 slew rate = 1. ...
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... Fig 15. I 002aab589 350 V O (mV) 250 150 + amb = 10 k PU(out) Fig 17. Connection circuitry V Rev. 04 — 18 August 2009 PCA9513A; PCA9514A 2 Hot swappable I C-bus and SMBus bus buffer characteristics”. characteristics”. and measure the SDAOUT and SCLOUT +25 ...
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... SCLIN, SDAIN, SCLOUT, SDAOUT ENABLE READY t is only applicable after the t stp(READY) Fig 20. t delay that can occur after t stp(READY) PCA9513A_PCA9514A_4 Product data sheet PCA9513A; PCA9514A Hot swappable idle(READY) , and t dis t en delay ...
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... Test information R = load resistor load capacitance includes jig and probe capacitance termination resistance should be equal to the output impedance Z T Fig 21. Test circuitry for switching times PCA9513A_PCA9514A_4 Product data sheet PCA9513A; PCA9514A Hot swappable PULSE DUT GENERATOR Rev. 04 — ...
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... 0.49 0.25 5.0 4.0 1.27 0.36 0.19 4.8 3.8 0.019 0.0100 0.20 0.16 0.244 0.05 0.014 0.0075 0.19 0.15 0.228 REFERENCES JEDEC JEITA MS-012 Rev. 04 — 18 August 2009 PCA9513A; PCA9514A 2 Hot swappable I C-bus and SMBus bus buffer detail 6.2 1.0 0.7 1 ...
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... 2.5 scale (1) ( 0.45 0.28 3.1 3.1 0.65 0.25 0.15 2.9 2.9 REFERENCES JEDEC JEITA Rev. 04 — 18 August 2009 PCA9513A; PCA9514A 2 Hot swappable I C-bus and SMBus bus buffer detail 5.1 0.7 0.94 0.1 0.1 0.1 4.7 0.4 EUROPEAN PROJECTION ...
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... Solder bath specifications, including temperature and impurities PCA9513A_PCA9514A_4 Product data sheet PCA9513A; PCA9514A Hot swappable I Rev. 04 — 18 August 2009 2 C-bus and SMBus bus buffer © NXP B.V. 2009. All rights reserved. ...
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... Lead-free process (from J-STD-020C) Package reflow temperature ( C) 3 Volume (mm ) < 350 260 260 250 Figure 24. Rev. 04 — 18 August 2009 PCA9513A; PCA9514A 2 C-bus and SMBus bus buffer Figure 24) than a SnPb process, thus 350 220 220 350 to 2000 > 2000 260 260 250 ...
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... Human Body Model Inter-Integrated Circuit bus Machine Model Peripheral Component Interface PCI Industrial Computer Manufacturers Group System Management Bus VERSAModule Eurocard Rev. 04 — 18 August 2009 PCA9513A; PCA9514A 2 Hot swappable I C-bus and SMBus bus buffer peak temperature time 001aac844 © NXP B.V. 2009. All rights reserved. ...
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... Product data sheet Product data sheet Product data sheet Rev. 04 — 18 August 2009 PCA9513A; PCA9514A 2 Hot swappable I C-bus and SMBus bus buffer Change notice Supersedes ...
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... Contact information For more information, please visit: For sales office addresses, please send an email to: PCA9513A_PCA9514A_4 Product data sheet PCA9513A; PCA9514A Hot swappable I [3] Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Document identifier: PCA9513A_PCA9514A_4 All rights reserved. Date of release: 18 August 2009 ...