MC74VHC74D MOTOROLA [Motorola, Inc], MC74VHC74D Datasheet
MC74VHC74D
Manufacturer Part Number
MC74VHC74D
Description
Dual D-Type Flip-Flop with Set and Reset
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC74VHC74D.pdf
(6 pages)
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Dual D-Type Flip-Flop
with Set and Reset
fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while maintaining
CMOS low power dissipation.
positive going transition of the Clock pulse.
accomplished by setting the appropriate input Low.
which provides high noise immunity and stable output. The inputs tolerate
voltages up to 7V, allowing the interface of 5V systems to 3V systems.
6/97
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
* Both outputs will remain high as long as Set and Reset are low, but the output
Motorola, Inc. 1997
states are unpredictable if Set and Reset go high simultaneously.
The MC74VHC74 is an advanced high speed CMOS D–type flip–flop
The signal level applied to the D input is transferred to Q output during the
Reset (RD) and Set (SD) are independent of the Clock (CP) and are
The internal circuit is composed of three stages, including a buffer output
High Speed: f max = 170MHz (Typ) at V CC = 5V
Low Power Dissipation: I CC = 2 A (Max) at T A = 25 C
High Noise Immunity: V NIH = V NIL = 28% V CC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2V to 5.5V Operating Range
Low Noise: V OLP = 0.8V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
Chip Complexity: 128 FETs or 32 Equivalent Gates
RD1
CP1
SD1
D1
1
2
3
4
SD
H
H
H
H
H
H
L
L
RD
FUNCTION TABLE
H
H
H
H
H
H
L
L
LOGIC DIAGRAM
5
6
Inputs
Q1
Q1
CP
X
X
X
H
L
D
X
X
X
H
X
X
X
L
RD2
CP2
SD2
D2
1
No Change
No Change
No Change
H*
Outputs
Q
H
H
L
L
13
12
11
10
H*
Q
H
H
L
L
9
8
Q2
Q2
REV 1
MC74VHC74
14–LEAD SOIC EIAJ PACKAGE
MC74VHCXXD
MC74VHCXXDT
MC74VHCXXM
14–LEAD TSSOP PACKAGE
ORDERING INFORMATION
14–LEAD SOIC PACKAGE
GND
RD1
CP1
SD1
Q1
Q1
D1
PIN ASSIGNMENT
CASE 948G–01
CASE 751A–03
CASE 965–01
DT SUFFIX
1
2
3
4
5
6
7
M SUFFIX
D SUFFIX
14
13
12
10
11
SOIC
TSSOP
SOIC EIAJ
9
8
V CC
RD2
D2
CP2
SD2
Q2
Q2
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MC74VHC74D Summary of contents
Page 1
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual D-Type Flip-Flop with Set and Reset The MC74VHC74 is an advanced high speed CMOS D–type flip–flop fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining ...
Page 2
MC74VHC74 Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î MAXIMUM RATINGS* Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...
Page 3
DC ELECTRICAL CHARACTERISTICS Î Î Î Î ...
Page 4
MC74VHC74 CP 50 1/f max t PLH t PHL 50 Figure 1. VALID 50 50% CP Figure 3. MOTOROLA SWITCHING WAVEFORMS 50 ...
Page 5
G SEATING PLANE 0.25 (0.010 14X REF 0.10 (0.004) 0.15 (0.006 L PIN 1 IDENT. 1 0.15 (0.006 ...
Page 6
MC74VHC74 0.13 (0.005) M 0.10 (0.004) Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or ...