MC74HC574ADW ONSEMI [ON Semiconductor], MC74HC574ADW Datasheet

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MC74HC574ADW

Manufacturer Part Number
MC74HC574ADW
Description
Octal 3-State Noninverting D Flip-Flop
Manufacturer
ONSEMI [ON Semiconductor]
Datasheet
1.MC74HC574ADW.pdf (8 pages)

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MC74HC574A
Octal 3-State Noninverting
D Flip-Flop
High–Performance Silicon–Gate CMOS
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
edge of the Clock. The Output Enable input does not affect the states
of the flip–flops, but when Output Enable is high, all device outputs
are forced to the high–impedance state. Thus, data may be stored even
when the outputs are not enabled.
flip–flop inputs on the opposite side of the package from the outputs to
facilitate PC board layout.
March, 2000 – Rev. 8
The MC74HC574A is identical in pinout to the LS574. The device
Data meeting the setup time is clocked to the outputs with the rising
The HC574A is identical in function to the HC374A but has the
No. 7A
Output Drive Capability: 15 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 A
In Compliance with the Requirements Defined by JEDEC Standard
Chip Complexity: 266 FETs or 66.5 Equivalent Gates
Semiconductor Components Industries, LLC, 2000
1
20
MC74HC574AN
MC74HC574ADW
MC74HC574ADWR2
20
1
1
Device
ORDERING INFORMATION
A
WL = Wafer Lot
YY = Year
WW = Work Week
SOIC WIDE–20
http://onsemi.com
DW SUFFIX
CASE 751D
= Assembly Location
CASE 738
N SUFFIX
PDIP–20
SOIC–WIDE
SOIC–WIDE
Publication Order Number:
Package
PDIP–20
20
20
1
1
MC74HC574A/D
MC74HC574AN
DIAGRAMS
MARKING
AWLYYWW
AWLYYWW
HC574A
1000 / Reel
1440 / Box
Shipping
38 / Rail

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MC74HC574ADW Summary of contents

Page 1

... SOIC WIDE– SUFFIX 1 CASE 751D A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week ORDERING INFORMATION Device Package MC74HC574AN PDIP–20 MC74HC574ADW SOIC–WIDE MC74HC574ADWR2 SOIC–WIDE 1 Publication Order Number: MARKING DIAGRAMS 20 MC74HC574AN AWLYYWW 1 20 HC574A AWLYYWW 1 Shipping 1440 / Box 38 / Rail ...

Page 2

LOGIC DIAGRAM DATA INPUTS CLOCK PIN 20 ...

Page 3

MAXIMUM RATINGS* Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...

Page 4

DC ELECTRICAL CHARACTERISTICS Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...

Page 5

TIMING REQUIREMENTS ( pF, ...

Page 6

CLOCK 50% 10 1/f max t PLH t PHL 90% Q 50% 10% t TLH t THL Figure 1. VALID DATA 50 CLOCK 50% Figure 3. TEST POINT OUTPUT ...

Page 7

SEATING PLANE 0.25 (0.010 20X T 0. 18X MC74HC574A PACKAGE DIMENSIONS PDIP–20 N SUFFIX PLASTIC DIP PACKAGE CASE 738–03 ...

Page 8

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any ...

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