LTC1857 LINEAR [Linear Integrated Systems], LTC1857 Datasheet
LTC1857
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LTC1857 Summary of contents
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... DC speci- fications include ±3LSB INL for the LTC1859, ±1.5LSB INL for the LTC1858 and ±1LSB for the LTC1857. The internal clock is trimmed for 5µs maximum conver- sion time and the sampling rate is guaranteed at 100ksps. ...
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... Digital Input Voltage (Note 4) ...... (DGND – 0.3V) to 10V Digital Output Voltage .... (DGND – 0.3V) to (DV Power Dissipation .............................................. 500mW Operating Temperature Range LTC1857C/LTC1858C/LTC1859C ............ 0°C to 70°C LTC1857I/LTC1858I/LTC1859I .......... – 40°C to 85°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec) ................. 300° ...
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... Hold Mode ADC , ADC + – ADC , ADC , CONVST = Low The ● denotes the specifications which apply over the full operating temperature range, LTC1857 CONDITIONS MIN TYP MAX 74 1kHz Input Signal, –101 First Five Harmonics 1kHz Input Signal –103 1kHz Input Signal – ...
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... LTC1857/LTC1858/LTC1859 TER AL REFERE CE CHARACTERISTICS full operating temperature range, otherwise specifications are at T PARAMETER V Output Voltage REF V Output Temperature Coefficient REF V Output Impedance REF V Output Voltage REFCOMP U U DIGITAL I PUTS A D DIGITAL OUTPUTS full operating temperature range, otherwise specifications are at T ...
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... LTC1859, between 00 0000 0000 0000 and 11 1111 1111 1111 for the LTC1858 and between 0000 0000 0000 and 1111 1111 1111 for the LTC1857. Unipolar zero error is the offset voltage = DD measured from 0 ...
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... LTC1857/LTC1858/LTC1859 W U TYPICAL PERFOR A CE CHARACTERISTICS LTC1859 Typical INL Curve 2.0 1.5 1.0 0.5 0 – 0.5 –1.0 –1.5 –2.0 –32768 0 –16384 16384 32767 CODE 1859 TA02 LTC1859 SINAD vs Input Frequency 100 INPUT FREQUENCY (kHz) 1859 G04 LTC1859 Channel-to-Channel Gain Error Matching vs Temperature 1 ...
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... Connect to ADC – MUXOUT (Pin 11): Negative MUX Output. Output of the analog multiplexer. Connect to ADC + ADC (Pin 12): Positive Analog Input to the Analog-to- Digital Converter. – ADC (Pin 13): Negative Analog Input to the Analog-to- Digital Converter. LTC1857/LTC1858/LTC1859 Supply Current vs Supply Voltage 9 100kHz SAMPLE 8.5 8.0 7.5 7.0 4.5 4. ...
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... LTC1857/LTC1858/LTC1859 CTIO S DGND (Pin 24): Digital Ground. SDI (Pin 25): Serial Data Input. SCK (Pin 26): Serial Data Clock CTIO AL BLOCK DIAGRA CH0 CH1 INPUT MUX • AND • RANGE • SELECT CH7 COM – MUXOUT AGND1 TEST CIRCUITS Load Circuits for Access Timing ...
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... SDO t (SDI Setup Time Before SCK↑ SCK 2.4V SDI 0.4V t (SDO Valid Before BUSY↑ 2.4V BUSY 2.4V SDO LTC1857/LTC1858/LTC1859 CONVST 50% BUSY 1859 TD01 t (Time from Previous Data Remains Valid After SCK↓) 7 SCK 5 SDO 1859 TD03 RD 2.4V SCK 0.4V 1859 TD05 2.4V SCK ...
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... The following list is a summary of the op amps that are suitable for driving the LTC1857/LTC1858/ LTC1859. More detailed information is available in the Linear Technology data books and online at www ...
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... The LTC1857/LTC1858/LTC1859 have an on-chip, tem- perature compensated, curvature corrected, bandgap ref- erence, which is factory trimmed to 2.50V. The full-scale range of the LTC1857/LTC1858/LTC1859 is equal to ±5V 5V, ±10V 10V. The output of the reference is connected to the input of a gain of 1.6384x buffer through an 8k resistor (see Figure 3). The input to the ...
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... REF and 00 0000 0000 0001 for the LTC1858 and between 0000 0000 0000 and 0000 0000 0001 for the LTC1857. For bipolar zero error, apply – 0.5LSB (actual voltage will vary with input span selected) to the “+” input and adjust the offset at the “ ...
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... LTC1859, between 11 1111 1111 1110 and 11 1111 1111 1111 for the LTC1858 and between 1111 1111 1110 and 1111 1111 1111 for the LTC1857. For bipolar inputs, an input voltage of FS – 1.5LSBs should be applied to the “+” input and the appropriate reference ...
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... LTC1857/LTC1858/LTC1859 U U APPLICATIO S I FOR ATIO 185789f ...
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... Figure 8. Examples of Multiplexer Options on the LTC1857/LTC1858/LTC1859 LTC1857/LTC1858/LTC1859 W U transfer cycle. As shown below, the result of a conversion is delayed by one conversion from the input word re- questing it. SDI SDI WORD 1 SDO SDO WORD 0 DATA TRANSFER INPUT DATA WORD The LTC1857/LTC1858/LTC1859 8-bit data word is clocked into the SDI input on the first eight rising SCK edges ...
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... POWER DOWN SELECTION (NAP, SLEEP) The last two bits of the input word (Nap and Sleep) deter- mine the power shutdown mode of the LTC1857/LTC1858/ LTC1859. See Table 3. Nap mode is selected when Nap = 1 and Sleep = 0. The previous conversion result will be clocked out and a conversion will occur before entering ...
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... U U APPLICATIO S I FOR ATIO LTC1857/LTC1858/LTC1859 W U 185789f 17 ...
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... Figure 13 shows the power supply grounding that will help obtain the best performance from the 12-bit/14-bit/16-bit ADCs. Pay particular attention to the design of the analog and digital ground planes. The DGND pin of the LTC1857 ...
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... The digital output latches and the onboard sampling clock have been placed on the digital ground plane. The two ground planes are tied together at the power supply ground connection ADC LTC1857/LTC1858/LTC1859 – ADC V REFCOMP AGND REF ...
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... LTC1857/LTC1858/LTC1859 U TYPICAL APPLICATIO 5V AV COM 1 2 CH0 3 CH1 SINGLE-ENDED OR DIFFERENTIAL CHANNEL INPUT MUX SELECTION • AND (SEE TABLE 1) RANGE • INPUT RANGES: SELECT • 10V ±5V AND ±10V 9 CH7 – AGND1 MUXOUT 14 11 RELATED PARTS PART NUMBER DESCRIPTION Sampling ADCs ...