LTC1857 LINEAR [Linear Integrated Systems], LTC1857 Datasheet - Page 15

• Manufacturer Part Number: LTC1857
• Description: 8-Channel, 12-/14-/16-Bit, 100ksps SoftSpan A/D Converters with Shutdown
• Manufacturer: LINEAR [Linear Integrated Systems]

APPLICATIO S I FOR ATIO
three-state at this time. When the conversion is complete
(BUSY goes high), CONVST and RD go low to enable the
data output for the previous conversion.
SERIAL DATA INPUT (SDI) INTERFACE
The LTC1857/LTC1858/LTC1859 communicate with mi-
croprocessors and other external circuitry via a synchro-
nous, full duplex, 3-wire serial interface (see Figure 7).
The shift clock (SCK) synchronizes the data transfer with
each bit being transmitted on the falling SCK edge and
captured on the rising SCK edge in both transmitting and
receiving systems. The data is transmitted and received
simultaneously (full duplex).
An 8-bit input word is shifted into the SDI input which
configures the LTC1857/LTC1858/LTC1859 for the next
conversion. Simultaneously, the result of the previous
conversion is output on the SDO line. At the end of the data
exchange the requested conversion begins by applying a
rising edge on CONVST. After t
complete and the results will be available on the next data
SGL/
Table 1. Multiplexer Channel Selection
DIFF
0
0
0
0
0
0
0
0
CHANNEL
MUX ADDRESS
0,1
2,3
4,5
6,7
{
{
{
{
SIGN
ODD
0
0
0
0
1
1
1
1
4 Differential
SELECT
+
–
+
–
+
–
+
–
1 0
0
0
1
1
0
0
1
1
(
(
(
(
(
(
(
(
–
+
–
+
–
+
–
+
)
)
)
)
)
)
)
)
0
1
0
1
0
1
0
1
U
0
+
–
DIFFERENTIAL CHANNEL SELECTION
1
–
+
Figure 8. Examples of Multiplexer Options on the LTC1857/LTC1858/LTC1859
U
CHANNEL
0
1
2
3
4
5
6
7
2
+
–
CONV
8 Single-Ended
+
+
+
+
+
+
+
+
COM (
W
3
–
+
, the conversion is
–
4
)
+
–
5
–
+
U
+
–
6
CHANNEL
0,1
2,3
Differential and Single-Ended
4
5
6
7
{
{
–
+
7
Combinations of
SGL/
DIFF
+
–
–
+
+
+
+
+
COM (
transfer cycle. As shown below, the result of a conversion
is delayed by one conversion from the input word re-
questing it.
SDI
SDO
INPUT DATA WORD
The LTC1857/LTC1858/LTC1859 8-bit data word is clocked
into the SDI input on the first eight rising SCK edges.
Further inputs on the SDI pin are then ignored until the next
conversion. The eight bits of the input word are defined as
follows:
1
1
1
1
1
1
1
1
MUX ADDRESS
SGL/
DIFF
–
SIGN
ODD
)
SDI WORD 1
SDO WORD 0
0
0
0
0
1
1
1
1
LTC1857/LTC1858/LTC1859
TRANSFER
DATA
SIGN
ODD
MUX ADDRESS
SELECT
1 0
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
CONVERSION
SELECT
4,5
6,7
1
t
CONV
A/D
{
{
0
+
SINGLE-ENDED CHANNEL SELECTION
SELECT
+
1ST CONVERSION
1
+
–
+
–
COM (UNUSED)
0
SDI WORD 2
SDO WORD 1
TRANSFER
MUX Assignment “On the Fly”
2
+
DATA
UNI
INPUT RANGE
3
+
Changing the
CONVERSION
4
+
4,5
GAIN
t
CONV
A/D
6
7
{
+
5
2ND CONVERSION
+
COM (
SDI WORD 3
SDO WORD 2
6
NAP
–
+
+
+
POWER DOWN
SELECTION
+
–
7
15
)
1859 • AI01
SLEEP
185789f
COM
1859 F08
1859 AI02
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