LTC1851 Linear Technology, LTC1851 Datasheet

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... Two Gain Ranges Plus Unipolar and Bipolar Operation 1.25Msps Sampling Rate Single 5V Supply and 40mW Power Dissipation Scan Mode and Programmable Sequencer Pin Compatible 10-Bit LTC1850 and 12-Bit LTC1851 www.DataSheet4U.com True Differential Inputs Reject Common Mode Noise Internal 2.5V Reference Parallel Output Includes MUX Address ...

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... (Notes Ambient Operating Temperature Range + 0.3V) LTC1850C/LTC1851C ............................ LTC1850I/LTC1851I .......................... – 0.3V) Storage Temperature Range ................. – 150 C DD Lead Temperature (Soldering, 10 sec)................ 300 ORDER PART NUMBER CH0 CH1 LTC1850CFW CH2 LTC1850IFW ...

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... CONDITIONS 4.75V V 5.25V DD V > 0V < All Channels IN DD Between Conversions (Gain = 1) Between Conversions (Gain = 2) During Conversions ) ACQ – < < LTC1850/LTC1851 LTC1850 LTC1851 MIN TYP MAX MIN TYP MAX 10 12 0.25 0.5 0.35 1 0.25 0 ...

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... DIFF OUT OUT OUT OUT OUT , DIFF CS High (Note 9) OUT OUT OUT OUT OUT OUT DD LTC1850 LTC1851 TYP MAX MIN TYP MAX 61.6 71 61.7 72 61.6 71 61.7 72 61.0 70 61.0 71 61.0 71 61.2 72 –76 –80 –78 –82 –81 –87 –80 – ...

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... Nap Mode (Note 10) Sleep Mode REFCOMP Bypass Capacitor (Note 10) (Notes 10, 11 25pF L (Note 10 25pF 100pF – (Note 10) (Notes 9, 10) (Notes 9, 10) (Note 10) LTC1850/LTC1851 MIN TYP MAX UNITS 4.75 5.25 V 2.7 5. ...

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... Note 8: Bipolar offset is the offset voltage measured from – 0.5LSB when the output code flickers between 0111 1111 1111 and 1000 0000 0000 for , DD LTC1851 and between 01 1111 1111 and 10 0000 0000 for LTC1850. without latchup. Note 9: Guaranteed by design, not subject to test. DD Note 10: Recommended operating conditions ...

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... TYPICAL PERFOR A CE CHARACTERISTICS Typical INL, PGA =1, LTC1851 1.00 0.50 0.00 –0.50 www.DataSheet4U.com –1.00 0 512 1024 1536 2048 2560 3072 3584 4096 CODE LTC1850/51 G01 Typical INL, PGA = 0, LTC1851 1.00 0.50 0.00 –0.50 –1.00 0 512 1024 1536 2048 2560 3072 3584 4096 CODE LTC1850/51 G07 Nonaveraged 4096 Point FFT, f ...

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... LTC1850/LTC1851 W TYPICAL PERFOR A CE CHARACTERISTICS Distortion vs Input Frequency, Bipolar Mode, PGA = 1 –50 –55 –60 –65 THD –70 –75 –80 –85 www.DataSheet4U.com 3RD HARMONIC –90 2ND HARMONIC –95 –100 10 100 1000 FREQUENCY (kHz) 185051 G09 Distortion vs Input Frequency, Unipolar Mode, PGA = 1 –50 – ...

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... LIMIT OF MEASUREMENT FREQUENCY (Hz 10M LTC1850/51 G12 10M LTC1850/51 G18 LTC1850/LTC1851 Channel-to-Channel Isolation (Worst Pair), Unipolar Mode, PGA = 0 110 100 90 LIMIT OF MEASUREMENT 10M INPUT FREQUENCY (Hz) LTC1850/51 G15 Channel-to-Channel Isolation ...

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... The output swings between OV and OGND. DD D10/S1 (Pin 22, LTC1851): Three-State Digital Data Out- puts. Active when RD is low. Following a conversion, bit 10 of the present conversion is available on this pin. In Readback mode, the gain bit of the current sequencer location (S1) is available on this pin ...

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... (Pins 24 to 30, LTC1850): Three-State Digital Data Outputs. Active when RD is low. The outputs swing between OV and OGND (Pins 24 to 32, LTC1851): Three-State Digital www.DataSheet4U.com Data Outputs. Active when RD is low. The outputs swing between OV and OGND (Pins 31, 32, LTC1850): No Connect. There is no internal connection to these pins ...

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... OUT 18 A2 /S5 OUT 19 A1 /S4 OUT 20 A0 /S3 OUT 21 D9/S2 (LTC1850) 21 D11/S2 (LTC1851) 22 D8/S1 (LTC1850) 22 D10/S1 (LTC1851) 23 D7/S0 (LTC1850) 23 D9/S0 (LTC1851 (LTC1850 (LTC1851 (LTC1850) 33 BUSY 34 OGND PGA 38 UNI/BIP DIFF CONVST 46 CS ...

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... U U APPLICATIO S I FOR ATIO The LTC1850/LTC1851 are complete and very flexible data acquisition systems. They consist of a 10-bit/12-bit, 1.25Msps capacitive successive approximation A/D con- verter with a wideband sample-and-hold, a configurable 8-channel analog input multiplexer, an internal reference and reference buffer amplifier, a 16-bit parallel digital output and digital control logic including a programmable sequencer ...

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... The full-linear bandwidth is the input frequency at which the S/( has dropped to 68dB for the LTC1851 (11 effective bits) or 56dB for the LTC1850 (9 effective bits). The LTC1850/LTC1851 have been designed to optimize input bandwidth, allowing the ADC to undersample input signals with frequencies above the converter’ ...

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... Driving the Analog Inputs The inputs of the LTC1850/LTC1851 are easy to drive. Each of the analog inputs can be used as a single-ended input relative to the input common pin (CH0-COM, CH1- COM, etc pairs (CH0 and CH1, CH2 and CH3, CH4 and CH5, CH6 and CH7) for differential inputs. Regardless of the MUX configuration, the “ ...

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... Input Filtering The noise and the distortion of the input amplifier and other circuitry must be considered since they will add to the LTC1850/LTC1851 noise and distortion. Noisy input circuitry should be filtered prior to the analog inputs to minimize noise. A simple 1-pole RC filter is sufficient for many applications. For instance, a 100 source resistor and a 1000pF capacitor to ground on the input will limit the input bandwidth to 1 ...

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... FS + 1.5LSB, ... – 1.5LSB, – 0.5LSB, 0.5LSB, 1.5LSB, ... FS – 1.5LSB, FS – 0.5LSB). The three most significant bits of the data word (D11, D10, and D9 for the LTC1851; D9, D8 and D7 for the LTC1850) also function as output bits when reading the contents of the programmable sequencer. During ...

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... DIFFERENTIAL BIT BIPOLAR BIT Figure 1. Readback Status Word BOARD LAYOUT AND BYPASSING To obtain the best performance from the LTC1850/ LTC1851, a printed circuit board with ground plane is required. The ground plane under the ADC area should free of breaks and holes as possible, such that a low impedance path between all ADC grounds and all ADC decoupling capacitors is provided ...

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... Figure 3. SHDN to CONVST Wake-Up Timing W U Power Shutdown The LTC1850/LTC1851 provide two power shutdown modes, Nap and Sleep, to save power during inactive periods. The Nap mode reduces the power to 5mW and leaves only the digital logic and reference powered up. The wake-up time from Nap to active is 200ns. In Sleep mode, all bias currents are shut down and only leakage current remains— ...

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... LTC1850/LTC1851 U U APPLICATIO S I FOR ATIO Figures 5 through 9 show several different modes of operation. In modes 1a and 1b (Figures 5 and 6), CS and RD are both tied low. The falling edge of CONVST starts the conversion. The data outputs are always enabled and data can be latched with the BUSY rising edge ...

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... DATA CONV DATA (N – 1) DATA N Figure 8. Slow Memory Mode Timing t t CONV DATA (N – 1) Figure 9. ROM Mode Timing LTC1850/LTC1851 1851 F07 DATA N DATA ( 1851 F08 DATA N 1851 F09 18501f 21 ...

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... Program/Readback Mode The LTC1850/LTC1851 include a sequencer that can be programmed to run a sequence locations containing a MUX address and input configuration. The MUX address and input configuration for each location are ...

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... OUT DIFF /S6, A2 OUT S1 and D7/S0 pins (LTC1850). The (LTC1851 (LTC1850) data output pins will remain high impedance during readback. RD going high will return the data output pins to a high impedance state and advance the pointer to the next location. A logic 1 on the D9/S0 (or D7/ S0) pin indicates the last location in the current sequence but all 16 locations can be read by continuing to clock RD ...

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... The part can also be disabled using CS or shutdown in Nap or Sleep mode without losing the programmed sequence. Table 5 out- lines the operational modes of the LTC1850/LTC1851. Figures 11 and 12 show the timing diagrams for writing to, reading from and running a sequence with the LTC1850/ LTC1851 ...

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... U U APPLICATIO S I FOR ATIO www.DataSheet4U.com W U LTC1850/LTC1851 18501f 25 ...

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... LTC1850/LTC1851 U U APPLICATIO S I FOR ATIO www.DataSheet4U.com 18501f ...

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... BSC LTC1850/LTC1851 12.4 – 12.6* (.488 – .496) 1.20 (.0473) MAX 0.17 – 0.27 0.05 – 0.15 (.0067 – .0106) (.002 – .006) 7.9 – 8.3 (.311 – ...

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... READ LOW FIFO lines. In the event of bus contention, resistors limit peak output current. If both FIFOs are read INPUT 5V CONFIGURATION: ALL 8 CHANNELS 10 F SINGLE ENDED TO COM CH0–CH7 4.096V 14 15 www.DataSheet4U.com LTC1851 1 CH0 2 CH1 3 CH2 4 CH3 8-CHANNEL 5 CH4 MULTIPLEXER 6 CH5 7 ...