LTC1851 Linear Technology, LTC1851 Datasheet - Page 28

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LTC1851

Manufacturer Part Number
LTC1851
Description
1.25Msps Sampling ADCs
Manufacturer
Linear Technology
Datasheet

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RELATED PARTS
PART NUMBER
LTC1410
LTC1415
LTC1418
LTC1419
LTC1604
LTC1852/LTC1853
LTC1850/LTC1851
TYPICAL APPLICATIO
Data buffering using two IDT7202LA15 1k x 9-bit FIFOs
allows rapid collection of 1024 samples and simple inter-
face to low power, low speed, 8-bit microcontrollers. Data
and channel information are clocked in simultaneously
and read out as two bytes using READ HIGH FIFO and
READ LOW FIFO lines. In the event of bus contention,
resistors limit peak output current. If both FIFOs are read
28
1 F
2.5V
INPUT
CONFIGURATION:
ALL 8 CHANNELS
SINGLE ENDED TO COM
CH0–CH7: 0V TO 4.096V
10
11
1
2
3
4
5
6
7
8
9
REFOUT
REFIN
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507
MULTIPLEXER
REF AMP
8-CHANNEL
REFERENCE
0.1 F
V
2.5V
DD
4.096V
14
1.6384X
REFCOMP
DESCRIPTION
12-Bit, 1.25Msps, 5V ADC
12-Bit, 1.25Msps, Single 5V ADC
14-Bit, 200ksps, Single 5V ADC
Low Power 14-Bit, 800ksps ADC
16-Bit, 333ksps, 5V ADC
10-Bit/12-Bit, 8-Channel, 400ksps ADCs
10 F
V
5V
DD
15
12
+
SAMPLING
LTC1851
12-BIT
ADC
GND
10 F
13
INTERNAL
U
CLOCK
GND
0.1 F
16
www.linear.com
LATCHES
DATA
PROGRAMMABLE
CONTROL LOGIC
SEQUENCER
AND
DRIVERS
OUTPUT
OV
DD
DIFF
A2
A1
A0
35
CONVST
UNI/BIP
D11/S2
D10/S1
OUT
OUT
OUT
OUT
UP TO 1024
OGND 34
SHDN
D9/S0
BUSY
completely or reset before a burst of conversions, the
empty, half full, and full flags from only one FIFO need to
be monitored. The retransmit inputs may also be tied
together. Retransmit may be used to read data repeatedly,
allowing a memory limited processor to perform trans-
form and filtering functions that would otherwise be
difficult.
*CONVERT
COMMENTS
71.5dB SINAD at Nyquist, 150mW Dissipation
55mW Power Dissipation, 72dB SINAD
15mW, Serial/Parallel 10V
True 14-Bit Linearity, 81.5dB SINAD, 150mW Dissipation
90dB SINAD, 220mW Power Dissipation, Pin Compatible with LTC1608
Pin-Compatible, Programmable Multiplexer and Sequencer
DIFF
PGA
WR
M1
M0
/S6
/S5
/S4
/S3
RD
CS
A2
A1
A0
D8
D7
D6
D5
D4
D3
D2
D1
D0
CLOCK
10 F
48
36
47
46
45
44
43
42
41
40
39
38
37
33
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
5V
5V
5V
5V
0.1 F
24
25
26
27
22
5V
2
3
4
5
6
1
8
D8
D7
D6
D5
D4
D3
D2
D1
D0
WR
FF
RS
IDT7202LA15
7
XI
24
25
26
27
22
5V
2
3
4
5
6
1
8
D8
D7
D6
D5
D4
D3
D2
D1
D0
WR
FF
RS
28
IDT7202LA15
7
GND
XI
0.1 F
Q8
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
RT
HF
14
EF
R
LINEAR TECHNOLOGY CORPORATION 2001
28
13
18
18
17
16
12
11
10
9
15
21
20
23
GND
0.1 F
READ_HIGH_FIFO
HIGH_FIFO_EMPTY
HIGH_FIFO_HALF_FULL
HIGH BYTE_FIFO_RETRANSMIT
Q8
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
HF
RT
HIGH_FIFO_FULL_FLAG
LOW_FIFO_FULL_FLAG
FIFO_RESET
EF
14
R
18501 TA01
LT/TP 0303 2K • PRINTED IN THE USA
13
19
18
17
16
12
11
10
9
15
21
20
23
READ_LOW_FIFO
LOW_FIFO_EMPTY
LOW_FIFO_HALF_FULL
LOW BYTE_FIFO_RETRANSMIT
8 1k
8 1k
DATA BUS
8-BIT
D7
D6
D5
D4
D3
D2
D1
D0
18501f

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