LTC1416 Linear Technology, LTC1416 Datasheet

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LTC1416

Manufacturer Part Number
LTC1416
Description
Low Power 14-Bit/ 400ksps Sampling ADC
Manufacturer
Linear Technology
Datasheet

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FEATURE
A
TYPICAL
REFCOMP
PPLICATI
, LTC and LT are registered trademarks of Linear Technology Corporation.
Telecommunications
Digital Signal Processing
Multiplexed Data Acquisition Systems
High Speed Data Acquisition
Spectrum Analysis
Imaging Systems
Sample Rate: 400ksps
Power Dissipation: 70mW
Guaranteed 1.5LSB DNL, 2LSB INL (Max)
80.5dB S/(N + D) and 93dB THD at 100kHz
80dB S/(N + D) and 90dB THD at Nyquist
Nap and Sleep Shutdown Modes
Operates with Internal or External Reference
True Differential Inputs Reject Common Mode Noise
15MHz Full Power Bandwidth Sampling
28-Pin SSOP Package
V
A
A
2.5V Bipolar Input Range
10 F
22 F
REF
IN
IN
1 F
+
Complete, 70mW, 14-Bit ADC with 80.5dB S/(N + D)
S
A
AV
O
PPLICATI
DD
S/H
U
BUFFER
10 F
4k
S
DV
–5V
DD
V
SS
14-BIT ADC
O
REFERENCE
2.5V
U
AGND
14
DGND
BUFFERS
OUTPUT
TIMING
LOGIC
AND
LTC1416
D
The LTC
converter that draws only 70mW from 5V supplies. This
easy-to-use device includes a high dynamic range sample-
and-hold and a precision reference. Two digitally select-
able power shutdown modes provide flexibility for low
power systems.
The LTC1416’s full-scale input range is 2.5V. Maximum
DC specifications include 2LSB INL, 1.5LSB DNL over
temperature. Outstanding AC performance includes 80.5dB
S/(N + D) and 93dB THD with a 100kHz input, and 80dB
S/(N + D) and 90dB THD at the Nyquist input frequency of
200kHz.
The unique differential input sample-and-hold can ac-
quire single-ended or differential input signals up to its
15MHz bandwidth. The 60dB common mode rejection
allows users to eliminate ground loops and common
mode noise by measuring signals differentially from the
source.
The ADC has a P compatible, 14-bit parallel output port.
There is no pipeline delay in the conversion results. A
separate convert start input and a data ready signal
(BUSY) ease connections to FIFOs, DSPs and micropro-
cessors.
D13 (MSB)
D0 (LSB)
BUSY
CS
CONVST
RD
SHDN
Low Power 14-Bit, 400ksps
ESCRIPTIO
1416 TA01
®
1416 is a 2.2 s, 400ksps, 14-bit sampling A/D
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1k
f
U
Signal-to-(Noise + Distortion)
SAMPLE
vs Input Frequency
Effective Bits and
= 400kHz
Sampling ADC
INPUT FREQUENCY (Hz)
10k
FREQUENCY
NYQUIST
100k
LTC1416
1416 TA02
1M 2M
86
80
74
68
62
1

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LTC1416 Summary of contents

Page 1

... Two digitally select- able power shutdown modes provide flexibility for low power systems. The LTC1416’s full-scale input range is 2.5V. Maximum DC specifications include 2LSB INL, 1.5LSB DNL over temperature. Outstanding AC performance includes 80.5dB S/( and 93dB THD with a 100kHz input, and 80dB S/( and 90dB THD at the Nyquist input frequency of 200kHz ...

Page 2

... High Between Conversions During Conversions (Note 9) – + – 2.5V < < 2. ORDER TOP VIEW PART NUMBER LTC1416CG LTC1416IG 25 BUSY CONVST SHDN PACKAGE 28-LEAD PLASTIC SSOP T = 110 C/W ...

Page 3

... High OUT DD CS High (Note OUT OUT DD (Note 5) CONDITIONS (Note 10) (Note 10) SHDN = 0V SHDN = 0V SHDN = 0V SHDN = 0V LTC1416 MIN TYP MAX UNITS 77 80 – 93 – – – 95 – – MHz ...

Page 4

... LTC1416 W U POWER REQUIRE E TS SYMBOL PARAMETER P Power Dissipation DISS Power Dissipation, Nap Mode Power Dissipation, Sleep Mode CHARACTERISTICS SYMBOL PARAMETER f Maximum Sampling Frequency SAMPLE(MAX) t Conversion Time CONV t Acquisition Time ACQ t Acquisition + Conversion Time ACQ+CONV Setup Time ...

Page 5

... IN – 10mV – 10mV –100 1k 10k 100k 1M 2M RIPPLE FREQUENCY (Hz) 1416 G08 LTC1416 Distortion vs Input Frequency 0 –10 –20 –30 –40 –50 –60 –70 –80 3RD –90 THD 2ND –100 –110 1k 10k 100k 1M 2M INPUT FREQUENCY (Hz) ...

Page 6

... LTC1416 CTIO (Pin 1): 2.5V Positive Analog Input. IN – A (Pin 2): 2.5V Negative Analog Input (Pin 3): 2.5V Reference Output. Bypass to AGND REF with 1 F. REFCOMP (Pin 4): 4.06V Reference Output. Bypass to AGND with 22 F tantalum in parallel with 0.1 F ceramic ceramic. AGND (Pin 5): Analog Ground. ...

Page 7

... U U APPLICATIONS INFORMATION CONVERSION DETAILS The LTC1416 uses a successive approximation algorithm and an internal sample-and-hold circuit to convert an analog signal to a 14-bit parallel output. The ADC is complete with a precision reference and an internal clock. The control logic provides easy interface to microproces- sors and DSPs. (Please refer to the Digital Interface section for the data format ...

Page 8

... ADC and is directly related to the S/( the equation: ENOB = [S/( – 1.76]/6.02 where ENOB is the Effective Number of Bits of resolution and S/( expressed in dB. At the maximum sampling rate of 400kHz the LTC1416 maintains near ideal 175 200 150 ENOBs up to the Nyquist input frequency of 200kHz (refer to Figure 3) ...

Page 9

... V 1 where V1 is the RMS amplitude of the fundamental fre- quency and V2 through Vn are the amplitudes of the second through Nth harmonics. THD versus input fre- quency is shown in Figure 4. The LTC1416 has good distortion performance up to the Nyquist frequency and beyond. 0 –10 –20 – ...

Page 10

... If slower op amps are used, more settling time can be provided by increasing the time between conversions. The best choice for an op amp to drive LTC1416 will depend on the application. Generally, applications fall into two categories: AC applications where dynamic specifica- tions are most critical and time domain applications where DC accuracy and settling time are most critical ...

Page 11

... AGND Figure 7. RC Input Filter Input Range The 2.5V input range of the LTC1416 is optimized for low noise and low distortion. Most op amps also perform best over this same range, allowing direct coupling to the analog inputs and eliminating the need for special transla- tion circuitry ...

Page 12

... The input span of the ADC can then be adjusted to match the peak input signal, maximizing the signal-to-noise ratio. The filtering of the internal LTC1416 reference amplifier will limit the bandwidth and settling time of this circuit. A settling time of 5ms should be allowed for after a reference adjustment. ...

Page 13

... A/D converters. To obtain the best – – performance from the LTC1416, a printed circuit board 1416 F11a with ground plane is required. Layout for the printed circuit board should ensure that digital and analog signal lines are separated as much as possible. In particular, care ...

Page 14

... V V REF COMP BUSY AGND D13 (MSB) CONVST 7 22 D12 D11 SHDN 9 20 D10 D0 LTC1416 DGND D5 Figure 12b. Using the LT1054 to Generate a – 5V Supply ...

Page 15

... CIRCUITRY traces connecting the pins and bypass capacitors must be kept short and should be made as wide as possible. The LTC1416 has differential inputs to minimize noise coupling. Common mode noise on the A will be rejected by the input CMRR. The A used as a ground sense for the A ...

Page 16

... LTC1416 U U APPLICATIONS INFORMATION ...

Page 17

... Component Side Silkscreen Figure 14d. Suggested Evaluation Circuit Board— Solder Side Layout W U Figure 14c. Suggested Evaluation Circuit Board— Component Side Layout Figure 15b. SHDN to CONVST Wake-Up Timing LTC1416 SHDN 1416 F15a Figure 15a SHDN Timing SHDN ...

Page 18

... LTC1416 U U APPLICATIONS INFORMATION Shutdown is controlled by Pin 21 (SHDN), the ADC is in shutdown when it is low. The shutdown mode is selected with Pin 20 (CS), low selects nap. Timing and Control Conversion start and data read operations are controlled by three digital inputs: CONVST, CS and RD. A logic “0” ...

Page 19

... DATA N DB13 TO DB0 CONV DATA (N – 1) DATA N DB13 TO DB0 DB13 TO DB0 Figure 20. Slow Memory Mode Timing LTC1416 t 6 DATA ( DB13 TO DB0 1416 F18 1416 F19 DATA N DATA ( DB13 TO DB0 DB13 TO DB0 1416 F20 19 ...

Page 20

... LTC1416 U U APPLICATIONS INFORMATION (SAMPLE CONVST t 6 BUSY DATA PACKAGE DESCRIPTIO 0.205 – 0.212** (5.20 – 5.38) 0 – 8 0.0256 0.005 – 0.009 0.022 – 0.037 (0.65) (0.13 – 0.22) (0.55 – 0.95) BSC * DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH ...

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