IDT70V3379S Integrated Device Technology, IDT70V3379S Datasheet

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IDT70V3379S

Manufacturer Part Number
IDT70V3379S
Description
High-speed 3.3v 32k X 18 Synchronous Pipelined Dual-port Static Ram With 3.3v Or 2.5v Interface
Manufacturer
Integrated Device Technology
Datasheet

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©2001 Integrated Device Technology, Inc.
R/
CE
CE
True Dual-Port memory cells which allow simultaneous
access of the same memory location
High-speed clock to data access
– Commercial: 4.2/5/6ns (max.)
– Industrial: 5/6ns (max)
Pipelined output mode
Counter enable and reset features
Dual chip enables allow for depth expansion without
additional logic
Full synchronous operation on both ports
– 7.5ns cycle time, 133MHz operation (9.6 Gbps bandwidth)
– Fast 4.2ns clock to data out
– 1.8ns setup to clock and 0.7ns hold on all control, data, and
UB
OE
LB
W
0L
1L
L
L
L
L
CLK
I/O
L
CNTRST
CNTEN
0 L
A
- I/O
ADS
A
14L
0L
1 7 L
L
L
L
Counter/
Address
Reg.
HIGH-SPEED 3.3V 32K x 18
SYNCHRONOUS PIPELINED
DUAL-PORT STATIC RAM
WITH 3.3V OR 2.5V INTERFACE
Dout0-8_L
Dout9-17_L
Din _L
ADDR_L
B
W
0
L
B
W
1
L
MEMORY
1
32K x 18
ARRAY
– Data input, address, byte enable and control registers
– Self-timed write allows fast cycle time
Separate byte controls for multiplexed bus and bus
matching compatibility
LVTTL- compatible, single 3.3V (±150mV) power supply for
core
LVTTL- compatible, selectable 3.3V (±150mV)/2.5V (±125mV)
power supply for I/Os and control signals on each port
Industrial temperature range (-40°C to +85°C) is
available for selected speeds
Available in a 128-pin Thin Quad Plastic Flatpack (TQFP)
and 208-pin fine pitch Ball Grid Array, and 256-pin
Ball Grid Array
Dout9-17_R
Dout0-8_R
B
W
1
R
ADDR_R
address inputs @ 133MHz
B
W
0
R
Din_R
Counter/
Address
Reg.
IDT70V3379S
4833 tbl 01
A
CNTRST
CNTEN
I/O
A
ADS
DSC 4833/8
OE
UB
LB
R/
CE
CE
14R
0R
0R
W
R
R
0R
1R
R
R
- I/O
R
CLK
R
R
17R
R
. ,

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