IDT70V3379S Integrated Device Technology, IDT70V3379S Datasheet - Page 11

• Manufacturer Part Number: IDT70V3379S
• Description: High-speed 3.3v 32k X 18 Synchronous Pipelined Dual-port Static Ram With 3.3v Or 2.5v Interface
• Manufacturer: Integrated Device Technology

NOTES:
1. OE is asynchronously controlled; all other inputs are synchronous to the rising clock edge.
2. ADS = V
3. The output is disabled (High-Impedance state) by CE
4. Addresses do not have to be accessed sequentially since ADS = V
5. If UB or LB was HIGH, then the appropriate Byte of DATA
NOTES:
1. B1 Represents Device #1; B2 Represents Device #2. Each Device consists of one IDT70V3379 for this waveform,
2. UB, LB, OE, and ADS = V
IDT70V3379S
High-Speed 32K x 18 Dual-Port Synchronous Pipelined Static RAM
ADDRESS
ADDRESS
Truth Table 1.
are for reference use only.
DATA
DATA
and are setup for depth expansion in this example. ADDRESS
ADDRESS
UB , LB
DATA
CE
CE
OUT(B1)
OUT(B2)
CLK
R/ W
IL
CE
CE
(0-3)
OUT
CLK
0(B1)
0(B2)
OE
, CNTEN and CNTRST = V
(B1)
(B2)
0
1
(4)
(1)
t
t
t
t
t
t
t
t
SC
SC
SA
SA
SW
SA
SC
SB
An
IL
A
A
; CE
0
0
t
t
t
t
t
HC
HC
t
t
t
HA
HA
HW
HC
HB
HA
t
CH2
(1 Latency)
1(B1)
t
CH2
t
CYC2
, CE
IH
.
1(B2)
t
CL2
t
CYC2
, R/W, CNTEN, and CNTRST = V
A
A
t
CKLZ
1
1
t
CL2
0
(1)
t
An + 1
CD2
= V
OUT
IH
, CE
for Qn + 2 would be disabled (High-Impedance state).
(B1)
t
t
1
t
SC
SC
CD2
= V
= ADDRESS
Q
A
A
IL
2
0
2
IL
constantly loads the address on the rising edge of the CLK; numbers
t
t
t
HC
HC
DC
, UB, LB = V
t
6.42
CD2
11
(B2)
IH
.
in this situation.
IH
t
An + 2
SB
(5)
Qn
following the next rising edge of the clock. Refer to
Q
A
A
3
1
3
t
t
t
HB
DC
t
CKHZ
CKLZ
t
DC
t
CD2
Industrial and Commercial Temperature Ranges
Qn + 1
A
A
Q
4
4
2
t
t
t
OHZ
CKHZ
CKLZ
t
An + 3
t
SC
CD2
(3)
t
HC
t
t
OE
OLZ
A
A
Q
5
5
3
t
t
CKHZ
CKLZ
Qn + 2
t
CD2
4833 drw 06
4833 drw 07
(5)
A
A
Q
6
6
4