AD5170 Analog Devices, AD5170 Datasheet
AD5170
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AD5170 Summary of contents
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... OTP setting is restored during subsequent power-up conditions. This feature allows users to treat these digital potentiometers as volatile potentiometers with a programmable preset. For applications that program the AD5170 at the factory, Analog Devices offers device programming software running on Windows NT®, 2000, and XP® operating systems. This software effectively replaces any external I enhancing the time-to-market of the user’ ...
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... AD5170 TABLE OF CONTENTS Electrical Characteristics—2.5 kΩ ................................................. 3 Electrical Characteristics—10 kΩ, 50 kΩ, 100 kΩ Versions ....... 4 Timing Characteristics—2.5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ Versions ............................................................................................................. 5 Absolute Maximum Ratings............................................................ 6 Typical Performance Characteristics ............................................. 7 Test Circuits..................................................................................... 11 Operation......................................................................................... 12 One-Time Programming (OTP) .............................................. 12 Programming the Variable Resistor and Voltage.................... 12 Programming the Potentiometer Divider ...
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... GND 0. 2.4 0.8 2.1 0.6 ±1 5 2.7 5.5 6 6.5 3.5 6 100 = ±0.02 ±0.08 4.8 0 and AD5170 Unit LSB LSB % ppm/°C Ω LSB LSB ppm/°C LSB LSB µ µ µA mA µW %/% MHz % µs nV/√Hz ...
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... AD5170 ELECTRICAL CHARACTERISTICS—10 kΩ, 50 kΩ, 100 kΩ VERSIONS Table ± 10 ± 10 Parameter DC CHARACTERISTICS—RHEOSTAT MODE 2 Resistor Differential Nonlinearity Resistor Integral Nonlinearity 2 3 Nominal Resistor Tolerance Resistance Temperature Coefficient (Wiper Resistance CHARACTERISTICS—POTENTIOMETER DIVIDER MODE (Specifications Apply to all VRs) ...
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... SCL After this period, the first clock 2 pulse is generated the SCL signal. LOW Rev Page AD5170 Min Typ Max Unit 400 kHz 1.3 µs 0.6 µs 1.3 µs 0.6 µs 0.6 µs 0.9 µs 100 ns 300 ns 300 ns 0.6 ...
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... AD5170 ABSOLUTE MAXIMUM RATINGS Table 25°C, unless otherwise noted A Parameter V to GND GND Terminal Current, Ax–Bx, Ax–Wx, Bx–Wx Pulsed Continuous Digital Inputs and Output Voltage to GND Operating Temperature Range Maximum Junction Temperature (T ) JMAX Storage Temperature Lead Temperature (Soldering, 10 sec) ...
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... 5. 2. 128 160 192 224 CODE (DECIMAL) Figure 6. INL vs. Code vs. Supply Voltages T = 25° 10kΩ 2. 5. 128 160 192 224 CODE (DECIMAL) Figure 7. DNL vs. Code vs. Supply Voltages AD5170 256 256 256 ...
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... AD5170 2 –40°C, +25°C, +85°C, +125°C A 1.0 0 5.5V DD –0 –40°C, +25°C, +85°C, +125°C A –1.0 –1.5 –2 128 160 CODE (DECIMAL) Figure 8. R-INL vs. Code vs. Temperature 0.5 0.4 0.3 0 2.7V, 5.5V –40°C, +25°C, +85°C, +125° 0.1 0 –0.1 –0.2 –0.3 – ...
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... AB 0x80 0x40 0x20 0x10 0x08 0x04 0x02 0x01 10k 100k FREQUENCY (Hz) Figure 18. Gain vs. Frequency vs. Code 100 kΩ AB 100kΩ 60kHz 50kΩ 120kHz 10kΩ 570kHz 2.5kΩ 2.2MHz 10k 100k 1M FREQUENCY (Hz) Figure 19. –3 dB Bandwidth @ Code = 0x80 AD5170 1M 1M 10M ...
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... AD5170 5. 2.7V DD 0.01 0 0.5 1.0 1.5 2.0 2.5 3.0 DIGITAL INPUT VOLTAGE (V) Figure 20. I vs. Input Voltage SCL Figure 21. Digital Feedthrough T = 25° 3.5 4.0 4.5 5.0 V SCL Rev Page Figure 22. Midscale Glitch, Code 0x80 to 0x7F W Figure 23. Large Signal Settling Time ...
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... Figure 27. Test Circuit for Power Supply Sensitivity (PSS, PSSR) DUT +15V AD8610 B OFFSET GND –15V 2.5V Figure 28. Test Circuit for Gain vs. Frequency NC DUT GND CONNECT Figure 29. Test Circuit for Common-Mode Leakage Current AD5170 ∆ ∆ OUT V CM ...
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... If the OTP function has been activated, the device powers up at the user-defined permanent setting. ONE-TIME PROGRAMMING (OTP) Prior to OTP activation, the AD5170 presets to midscale during initial power-on. After the wiper is set at the desired position, the resistance can be permanently set by programming the T bit high along with the proper coding (see Table 5 and Table 6) ...
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... Figure 33. Potentiometer Mode Configuration with respect to ground for any valid input W − D 256 256 256 can be found and R and not the abso AD5170 with AB (3) (4) ...
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... Figure 38. and GND DD 3.5V–5.5V , the DD Figure 38. Isolate 6 V OTP Supply from 3 5.5 V Normal Operating Supply. The 6 V supply must be removed once OTP is completed. Rev Page terminal of the AD5170. The AD5170 employs DD CONNECT J1 HERE FOR OTP R1 50kΩ 1µ ...
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... P2 gates are pulled to ground, thus turning on P1 and subse- quently P2 result the AD5170 approaches 2 When the AD5170 setting is found, the factory tester applies the the also applied to the gates of P1 and turn them off. The OTP command is executed at this time to program the AD5170 ...
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... Pins 2, 3, 15, and 25 for SDA_write, SCL, SDA_read, and DGND, respectively, for the control signals (Figure 42). Users should also lay out the PCB of the AD5170 with SCL and SDA pads, as shown in Figure 43, such that pogo pins can be inserted for factory programming. ...
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... Figure 42. Parallel Port Connection. Pin 2 = SDA_write, Pin 3 = SCL, Pin 15 = SDA_read, and Pin 25 = DGND. Figure 43. Recommended AD5170 PCB Layout. The SCL and SDA pads allow pogo pins to be inserted so that signals can be communicated through the SCL SDA Rev Page ...
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... AD5170 INTERFACE Table 7. Write Mode 1 AD1 AD0 Slave Address Byte Table 8. Read Mode AD1 AD0 R Slave Address Byte S = Start Condition P = Stop Condition A = Acknowledge AD0, AD1 = Package Pin Programmable Address Bits X = Don’t Care W = Write R = Read 2T = Second fuse link array for two-time programming ...
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... INSTRUCTION BYTE Figure 46. Reading Data from the RDAC Register Rev Page ACK BY AD5170 STOP BY FRAME 3 DATA BYTE MASTER ACK BY MASTER FRAME 3 STOP BY DATA BYTE MASTER AD5170 ...
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... AD5170 COMPATIBLE 2-WIRE SERIAL BUS 2 The 2-wire I C serial bus protocol operates as follows: 1. The master initiates data transfer by establishing a START condition, which is when a high-to-low transition on the SDA line occurs while SCL is high (see Figure 45). The following byte is the slave address byte, which consists of ...
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... Successful. No further programming is possible Multiple Devices on One Bus Figure 47 shows four AD5170s on the same serial bus. Each has a different slave address because the states of their AD0 and AD1 pins are different. This allows each device on the bus to be written to or read from independently. The master device output bus line drivers are open-drain pull-downs in a fully I compatible interface ...
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... GND SCL 7 SDA 8 AD1 AD5170 AD1 AD0 3 8 TOP VIEW GND SDA SCL DD Figure 48. Pin Configuration Description B Terminal. A Terminal. Programmable Address Bit 0 for Multiple Package Decoding. Digital Ground. Positive Power Supply. ...
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... OUTLINE DIMENSIONS ORDERING GUIDE Model R (kΩ) AB AD5170BRM2.5 2.5 AD5170BRM2.5-RL7 2.5 AD5170BRM10 10 AD5170BRM10-RL7 10 AD5170BRM50 50 AD5170BRM50-RL7 50 AD5170BRM100 100 AD5170BRM100-RL7 100 1 AD5170EVAL 1 The evaluation board is shipped with the 10 kΩ R 3.00 BSC 10 6 4.90 BSC 3.00 BSC 1 5 PIN 1 0.50 BSC 0.95 0.85 1.10 MAX 0.75 0.15 0.27 SEATING 0.23 0.00 0.17 PLANE 0.08 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187BA Figure 49 ...
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... AD5170 NOTES 2 Purchase of licensed I C components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I Rights to use these components system, provided that the system conforms to the I © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners ...