74ACT175 ON Semiconductor, 74ACT175 Datasheet

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74ACT175

Manufacturer Part Number
74ACT175
Description
QUAD D FLIP-FLOP WITH MASTER RESET
Manufacturer
ON Semiconductor
Datasheet

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Quad D Flip Flop With
Master Reset
general flip-flop requirements where clock and clear inputs are common. The
information on the D inputs is transferred to storage during the LOW-to-HIGH clock
transition. The device has a Master Reset to simultaneously clear all flip-flops, when
MR is low.
D inputs and Q and Q outputs. The Clock (CP) and Master Reset (MR) are common
to all flip-flops. Each D input’s state is transferred to the corresponding flip-flop’s
output following the LOW-to-HIGH Clock (CP) transition. A LOW input to the Master
Reset (MR) will force all Q outputs LOW and Q outputs HIGH independent of Clock
or Data inputs. The MC74AC/ACT175 is useful for applications where the Clock and
Master Reset are common to all storage elements.
TRUTH TABLE
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
= LOW-to-HIGH Transition of Clock
Outputs Source/Sink 24 mA
V CC
ACT175 Has TTL Compatible Inputs
The MC74AC/ACT175 is a high-speed quad D flip-flop. The device is useful for
The MC74AC/ACT175 consists of four edge-triggered D flip-flops with individual
MR
MR
16
1
H
H
H
L
Pinout: 16-Lead Packages (Top View)
Q 3
Q 0
15
2
Inputs
CP
X
L
Q 3
Q 0
14
3
D 3
D 0
13
4
D
X
H
X
L
D 2
12
D 1
5
Q 2
Q 1
11
Qn
6
Qn
H
L
L
Outputs
Q 2
Q 1
10
7
Qn
Qn
GND
H
H
L
CP
9
8
PIN NAMES
D 0 – D 3
CP
MR
Q 0 – Q 3
Q 0 – Q 3
FACT DATA
5-1
Data Inputs
Clock Pulse Input
Master Reset Input
Outputs
Outputs
CP
MR
Q 0
D 0
Q 0
D 1
MC74ACT175
MC74AC175
Q 1
D 2
LOGIC SYMBOL
WITH MASTER RESET
QUAD D FLIP-FLOP
Q 1
D 3
CASE 751B-05
CASE 648-08
N SUFFIX
D SUFFIX
PLASTIC
PLASTIC
Q 2
Q 2
Q 3
Q 3

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74ACT175 Summary of contents

Page 1

... Q 0 – Outputs Q 0 – Outputs 8 GND FACT DATA 5-1 MC74AC175 MC74ACT175 QUAD D FLIP-FLOP WITH MASTER RESET N SUFFIX CASE 648-08 PLASTIC D SUFFIX CASE 751B-05 PLASTIC LOGIC SYMBOL ...

Page 2

... MC74AC175 MC74ACT175 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. MAXIMUM RATINGS* Symbol Supply Voltage (Referenced to GND Input Voltage (Referenced to GND) V out ...

Page 3

... MC74AC175 MC74ACT175 DC CHARACTERISTICS Symbol Symbol Parameter Parameter V IH Minimum High Level Input Voltage Input Voltage V IL Maximum Low Level Input Voltage Input Voltage V OH Minimum High Level Output Voltage Output Voltage V OL Maximum Low Level Output Voltage Output Voltage I IN Maximum Input ...

Page 4

... MC74AC175 MC74ACT175 AC OPERATING REQUIREMENTS Symbol Symbol Parameter Parameter Set-up Time, HIGH or LOW Hold Time, HIGH or LOW Pulse Width Low Pulse Width Recovery TIme t rec t rec Voltage Range 3 3.3 V 0.3 V. ...

Page 5

... MC74AC175 MC74ACT175 AC CHARACTERISTICS Symbol Symbol Parameter Parameter Maximum Clock f max f max Frequency Frequency Propagation Delay t PLH t PLH Propagation Delay t PHL t PHL Propagation Delay t PHL t PHL Voltage Range 5 5.0 V 0.5 V. ...

Page 6

... MC74AC175 MC74ACT175 –A– 0.25 (0.010) –A– –T– SEATING PLANE 0.25 (0.010 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “ ...

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