CA3524E Intersil, CA3524E Datasheet - Page 8

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CA3524E

Manufacturer Part Number
CA3524E
Description
REGUL. PULSE WIDTH MODULATOR
Manufacturer
Intersil
Datasheet

Specifications of CA3524E

Rohs Status
RoHS non-compliant
Other names
CA3524

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of the output duty cycle as a function of the voltage at
terminal 9 are shown in Figure 7. To synchronize two or
more CAl524’s, one must be designated as master, with R
C
(slaves) must have a C
and approximately a 1010 longer R
ter. Connecting terminal 3 together on all units assures that
the master output pulse, which occurs first and has a wider
pulse width, will reset the slave units.
Error AmplIfIer Section
The error amplifier consists of a differential pair (Q56,Q57)
with an active load (Q61 and Q62) forming a differential
transconductance amplifier. Since Q61 is driven by a
constant current source, Q62, the output impedance R
terminal 9, is very high ( 5M ).
The gain is:
Since R
reduced from a nominal 10
external shunt resistor from terminal 9 to ground as shown in
Figure 6.
T
FIGURE 5. TYPICAL OSCILLATOR PERIOD AS A FUNCTION
FIGURE 6. OPEN-LOOP ERROR AMPLIFIER RESPONSE
A
where R =
set for the correct period. Each of the remaining units
V
= g
m
OUT
50
40
70
60
0
80
R = 8 l
o
10
10
10
10
5
4
3
OF R
CHARACTERISTICS.
R
R
R
R
is extremely high, the gain can be easily
1
R
L
L
L
L
C
T
V+ = 8V - 40V
R
L
= 1M
R
= 300k
=100k
A
C
C
T
= 3M
C
OUT
T
=
T
T
= 0.005 F
OUT
= +25
R
R/2KT = 10
AND C
= 0.001 F
= 0.002 F
L
10
R
+
OSCILLATOR PERIOD, t ( s)
o
L
2
T
10
C
FREQUENCY (Hz)
of 1/2 the value used in the master
T
, R
4
L
4
10
C
(80dB) by the addition of an
= , A
,
T
OPEN LOOP PHASE
3
10
= 0.01 F
2
OPEN LOOP GAIN
T
C
V
T
period than the mas-
10
10
C
10
4
C
T
C
T
CA1524, CA2524, CA3524
3
4
T
= 0.1 F
= 0.05 F
= 0.02 F
10
10
5
90
50
4
o
OUT
T
,
8
The output amplifier terminal is also used to compensate the
system for ac stability. The frequency response and phase
shift curves are shown in Figure 7. The uncompensated
amplifier has a single pole at approximately 250Hz and a
unity gain cross-over at 3MHz.
Since most output filter designs introduce one or more
additional poles at a lower frequency, the best network to
stabilize the system is a series RC combination at terminal9
to ground. This network should be designed to introduce a
zero to cancel out one of the output filter poles. A good start-
ing point to determine the external poles is a 1000-pF
capacitor and a variable series 50-K
terminal 9 to ground. The compensation point is also a
convenient place to insert any programming signal to
override the error amplifier. internal shutdown and current
limiting are also connected at terminal 9. Any external circuit
that can sink 200 A can pull this point to ground and shut off
both output drivers.
While feedback is normally applied around the entire regula-
tor, the error amplifier can be used with conventional
operational amplifier feedback and will be stable in either the
inverting or non-inverting mode. Input common-mode limits
must be observed; if not, output signal inversion may result.
The internal 5V reference can be used for conventional regu-
lator applications if divided as shown in Figure 8. If the error
amplifier is connected as a unity gain amplifier, a fixed duty
cycle application results.
FIGURE 7. TYPICAL DUTY CYCLE AS A FUNCTION OF
FIGURE 8. TYPICAL OUTPUT SATURATION VOLTAGE AS A
48
40
32
24
16
1.1
1.0
0.9
0.8
0.7
8
0
COMPARATOR VOLTAGE (AT TERMINAL 9).
FUNCTION OF AMBIENT TEMPERATURE.
-75 -50 -25
0
T
V+ = 20V
A
0.4 0.8 1.2 1.6
= +25
AMBIENT TEMPERATURE (
COMPARATOR VOLTAGE (V)
o
C
R
f
C
OSC
T
T
= 2700pF
= 6.19k
0
= 60kHz
25 50 75 100 125 150 175
2
2.4 2.8 3.2 3.6
C
R
f
OSC
T
T
=1000pF
= 5k
potentiometer from
= 20kHz
o
C)
4

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