SW006012 Microchip Technology, SW006012 Datasheet - Page 54

• Manufacturer Part Number: SW006012
• Description: C COMPILER FOR DSPIC30F FAMILY
• Manufacturer: Microchip Technology
• Type: MPLAB® C30 Compilerr
• Series: PIC24 & DsPICr

Specifications of SW006012

• Supported Families: PIC24, DsPIC30F And DsPIC33F
• Core Architecture: PIC, DsPIC
• Kit Contents: Software And Docs
• Mcu Supported Families: PIC24 MCUs And DsPIC DSCs
• Tool Type: Compiler
• Processor Series: PIC24, dsPIC
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• For Use With/related Products: dsPIC30F
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MPLAB
DS51284F-page 48
®
C30 User’s Guide
TABLE 3-9:
-fcse-follow-jumps
-fcse-skip-blocks
-fexpensive-
-ffunction-sections
-fdata-sections
-fgcse
-fgcse-lm
-fgcse-sm
-fmove-all-movables
-fno-defer-pop
-fno-peephole
-fno-peephole2
-foptimize-
-fregmove
optimizations
register-move
Option
SPECIFIC OPTIMIZATION OPTIONS (CONTINUED)
In common subexpression elimination, scan through jump
instructions when the target of the jump is not reached by any
other path. For example, when CSE encounters an if
statement with an else clause, CSE will follow the jump when
the condition tested is false.
This is similar to -fcse-follow-jumps, but causes CSE to
follow jumps which conditionally skip over blocks. When CSE
encounters a simple if statement with no else clause,
-fcse-skip-blocks causes CSE to follow the jump around
the body of the if.
Perform a number of minor optimizations that are relatively
expensive.
Place each function or data item into its own section in the
output file. The name of the function or the name of the data
item determines the section's name in the output file.
Only use these options when there are significant benefits for
doing so. When you specify these options, the assembler and
linker may create larger object and executable files and will
also be slower.
Perform a global common subexpression elimination pass.
This pass also performs global constant and copy
propagation.
When -fgcse-lm is enabled, global common subexpression
elimination will attempt to move loads which are only killed by
stores into themselves. This allows a loop containing a
load/store sequence to be changed to a load outside the loop,
and a copy/store within the loop.
When -fgcse-sm is enabled, a store motion pass is run after
global common subexpression elimination. This pass will
attempt to move stores out of loops. When used in conjunction
with -fgcse-lm, loops containing a load/store sequence can
be changed to a load before the loop and a store after the
loop.
Forces all invariant computations in loops to be moved outside
the loop.
Always pop the arguments to each function call as soon as
that function returns. The compiler normally lets arguments
accumulate on the stack for several function calls and pops
them all at once.
Disable machine specific peephole optimizations. Peephole
optimizations occur at various points during the compilation.
-fno-peephole disables peephole optimization on machine
instructions, while -fno-peephole2 disables high level
peephole optimizations. To disable peephole entirely, use both
options.
Attempt to reassign register numbers in move instructions and
as operands of other simple instructions in order to maximize
the amount of register tying.
-fregmove and -foptimize-register-moves are the
same optimization.
Definition
© 2007 Microchip Technology Inc.