KIT33999EKEVB Freescale Semiconductor, KIT33999EKEVB Datasheet - Page 13

• Manufacturer Part Number: KIT33999EKEVB
• Description: KIT EVAL 33999 16OUTPUT SW W/SPI
• Manufacturer: Freescale Semiconductor

Specifications of KIT33999EKEVB

• Main Purpose: Power Management, Low Side Driver (Internal FET)
• Embedded: No
• Utilized Ic / Part: MC33999
• Primary Attributes: 16 Outputs, 5 ~ 27V, 900mA, SPI Interface, PWM Interface
• Secondary Attributes: 0.55 Ohm RdsON, Temperature, Over Voltage, Short Circuit Protection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

POWER CONSUMPTION
Operational mode. In Sleep mode (SO
current consumed by the VPWR pin is less than 50 µA.To
place the 33999 in Sleep mode, turn all outputs OFF and
remove power from the SOPWR pin. During normal
operation, 500 µA is drawn from the SO
8.0 mA from the V
PARALLELING OF OUTPUTS
of any combination of outputs together. The R
MOSFETs has an inherent positive temperature coefficient
providing balanced current sharing between outputs without
destructive operation. This mode of operation may be
desirable in the event the application requires lower power
dissipation or the added capability of switching higher
currents. Performance of parallel operation results in a
corresponding decrease in R
Limit increases correspondingly. Output OFF Open Load
Detect current may increase based on how the Output OFF
Open Load Detect is programmed. Paralleling outputs from
two or more different IC devices is possible but not
recommended.
loads. The Output Voltage Clamp of the output drivers may
not match. One MOSFET output must be capable of the
inductive energy from the load turn OFF.
Analog Integrated Circuit Device Data
Freescale Semiconductor
The 33999 is designed with one Sleep mode and one
Using MOSFETs as output switches allows the connection
Care must be taken when paralleling outputs for inductive
PWR
supply.
DS(ON)
, while the Output Current
PWR
Microcontroller
PWR
MC68HCXX
Shift Register
≤ 2.0 V), the
Parallel
supply and
Ports
Figure 11. Parallel Inputs SI Control
DS(ON)
of
PWM2
MOSI
MISO
SCLK
PWM1
SPI INTEGRITY CHECK
recommended upon initial power-up of the SOPWR pin. After
initial system startup or reset, the MCU writes one 48-bit
pattern to the 33999.
outputs, while the second 24 bits is the first bit pattern sent.
By the MCU receiving the same bit pattern it sent, bus
integrity is confirmed. Please note the second 24 bits the
MCU sends to the 33999 are the command bits to program
registers or activate outputs on the rising edge of
OUTPUT OFF OPEN LOAD FAULT
reporting of an open load when the corresponding output is
disabled (input bit programmed to a logic low state). The
Output OFF Open Load Fault is detected by comparing the
drain-to-source voltage of the specific MOSFET output to an
internally generated reference. Each output has one
dedicated comparator for this purpose.
source. The pulldown current is disabled on power-up and
must be enabled for Open Load Detect to function. Once
enabled, the 33999 will only shut down the pulldown current
in Sleep mode or when disabled via SPI.
a false Output OFF Open Load Fault may be triggered. To
prevent this false fault from being reported, an internal fault
Checking the integrity of the SPI communication is
The first 24 bits read by the MCU is the fault status of the
An Output OFF Open Load Fault is the detection and
Each 33999 output has an internal 50 µA pulldown current
During output switching, especially with capacitive loads,
SI
SO
SCLK
CS
PWM
RST
SI
SO
SCLK
CS
PWM
RST
33999
33999
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
CS
.
33999
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