DK-PCI-2C35N Altera, DK-PCI-2C35N Datasheet - Page 23
DK-PCI-2C35N
Manufacturer Part Number
DK-PCI-2C35N
Description
PCI KIT W/CYCLONE II EP2C35N
Manufacturer
Altera
Series
Cyclone® IIr
Type
FPGA: PCI Development Kitr
Datasheet
1.DK-PCI-2C35N.pdf
(40 pages)
Specifications of DK-PCI-2C35N
Contents
Dev Board, Quartus®II Web Edition, Cables, Accessories, Reference Designs and Demos
For Use With/related Products
Cyclone ll 2C35N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-1733
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Figure 2–7. PCI Master Loop (Debug Tab)
Altera Corporation
May 2005
PCI Master Loop (Debug Tab)
In this example, a PCI master read is followed by a PCI master write
transaction. The kit’s application verifies that the data read and written
by the master is the same.
1.
2.
3.
4.
5.
6.
7.
Ensure that the Debug tab is active.
Select Master Loop from the Commands box.
Keep the Address Offset setting of 0x0000000.
Specify the following settings in the Address/Size box:
●
●
In the Data Type list, select AA55 Packet.
Click Execute.
Review the results in the Display Window (see
PCI Development Kit, Cyclone II Edition Getting Started User Guide
Transfer Length: 4096
Iterations: 2
Core Version a.b.c variable
Figure
Getting Started
2–7).
2–13