SI3220PPTX-EVB Silicon Laboratories Inc, SI3220PPTX-EVB Datasheet - Page 108
SI3220PPTX-EVB
Manufacturer Part Number
SI3220PPTX-EVB
Description
BOARD EVAL W/DISCRETE INTERFACE
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheet
1.SI3200-G-FSR.pdf
(112 pages)
Specifications of SI3220PPTX-EVB
Main Purpose
Interface, Analog Front End (AFE)
Utilized Ic / Part
Si3220
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
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Si3220/25 Si3200/02
7. Package Outline: 16-Pin ESOIC
Figure 66 illustrates the package details for the Si3200/2. Table 54 lists the values for the dimensions shown in the
illustration.
108
Figure 66. 16-Pin Thermal Enhanced Small Outline Integrated Circuit (ESOIC) Package
16
Seating Plane
1
e
B
D
Table 54. Package Diagram Dimensions
9
8
A1
Exposed Pad
2.3 x 3.6 mm
Bottom Side
γ
Symbol
E
A1
A
B
C
D
E
H
e
h
L
θ
γ
A
H
Rev. 1.3
1.35
9.80
3.80
5.80
Min
.33
.19
.25
.40
—
0º
0
Millimeters
1.27 BSC
Weight: Approximate device weight is 0.15 grams.
θ
10.00
Max
1.75
0.15
4.00
6.20
1.27
0.10
Detail F
.51
.25
.50
8º
L
h
See Detail F
0.010
C
GAUGE PLANE
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