LVDSEVAL-001 National Semiconductor, LVDSEVAL-001 Datasheet - Page 6

• Manufacturer Part Number: LVDSEVAL-001
• Description: EVALUATION BOARD FOR DS90LV031A
• Manufacturer: National Semiconductor

Specifications of LVDSEVAL-001

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *LVDSEVAL-001

LVDS signals should be kept away from CMOS logic signals to minimize noise coupling from the large
swing CMOS signals. This has been accomplished on the PCB by routing CMOS signals on a different
signal layer (bottom) than the LVDS signals (top) wherever possible. If they are required on the same
layer, a CMOS signal should never be routed within three times (3S) the distance between the differential
pair (S). Adjacent differential pairs should be at least 2S away also.
Bypassing capacitors are recommended for each package. 0.1 µF is sufficient on the quad driver or
receiver device (CB2 and CB3) however, additional smaller value capacitors may be added (i.e. 0.001 µF
at CB12 and CB13) if desired. Traces connecting Vcc and ground should be wide (low impedance, not 50
Ohm dimensions) and employ multiple vias to reduce inductance. Bulk bypassing is provided (CBR1,
close by) at the main power connection as well. Additional power supply high frequency bypassing can
be added at CB1, CB11, and CB21 if desired.
6.1.5 Sample Waveforms from the LVDS Evaluation PCB
Single-ended signals are measured from each signal (true and inverting signals) with respect to ground.
The receiver ideally switches at the crossing point of the two signals. LVDS signals should swing between
1.0 V (V
B (inverting) signal from the A (true) signal. V
tive, so the differential swing (V
corresponding differential waveforms are shown in Figure #3.
OL
) and 1.3 V (V
OH
) for a 300 mV V
Single-Ended Waveforms
Differential Waveform
Figure 3: Single-ended & Differential Waveforms
A
SS
Pair 1
Figure 2: Pair Spacing for differential lines
) is twice the V
B
+V
OD
W
OD
V
OD
. The differential waveform is constructed by subtracting the
A
OD
Pair 2
OD
= A - B. The V
B
>2S
magnitude. Drawn single-ended waveforms and the
-V
S
OD
TTL/CMOS
A
+100mV
0V Differential ( 1.2V)
-100mV
B
Ground
A - B = 0V
OD
1.4V V
1.0V V
magnitude is either positive or nega-
>>2S
OH
OL
LVDS Owner’s Manual
69