ATF15XX-DK2 Atmel, ATF15XX-DK2 Datasheet - Page 29
ATF15XX-DK2
Manufacturer Part Number
ATF15XX-DK2
Description
KIT CPLD DEVELOPMENT/PROGRAMMER
Manufacturer
Atmel
Specifications of ATF15XX-DK2
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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3.4
CPLD Development/Programmer Kit User Guide
Compile the
CUPL Design
In this part of the tutorial, the CUPL design will be compiled through the Logic Synthesis
process into a set of optimized/minimized logic equations.
1. Click on the CUPL – Design Ex. button in the Design Flow Window to open the
2. Make sure all of the options in the Optimization section are unchecked.
3. Make sure the Minimization setting is set to Quick.
4. Click on the Compile button to start the CUPL compile process.
The user can click on the Set Defaults button and it will automatically specify the Syn-
thesis tool in the Tool Text box.
If the user clicks on the CUPL Tab, it shows the various Synthesis options. Please refer
to the HELP file for further description.
(3) Set to
Quick
Logic Synthesis Window.
(4) Start the
Compile
Process
(1) Open Logic
Synthesis
CPLD Design Flow Tutorial
(2) Make sure these
Options are
Not Checked
3300A–PLD–08/02
3-9
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