SW006010 Microchip Technology, SW006010 Datasheet - Page 116

• Manufacturer Part Number: SW006010
• Description: MPLAB 17C SOFTWARE
• Manufacturer: Microchip Technology

Specifications of SW006010

• Tool Function: Compiler
• Tool Type: Compiler
• Processor Series: PIC17C
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• For Use With/related Products: MPLAB®
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MPLAB
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C17 C Compiler Libraries
Extended Microcontroller Mode - PIC17CXXX and PIC18CXXX Devices Only
In extended microcontroller mode, on-chip program memory as well as external
memory is available. Execution automatically switches to external if the program
memory address is greater than the internal memory space of the PIC17CXXX or
PIC18CXXX device.
External Input Line (MPLAB ICE 2000)
An external input signal logic probe line (TRIGIN) for setting an event based upon
external signals.
External Label (Linkers)
A label that has external linkage.
External Linkage (Linkers)
A function or variable has external linkage if it can be referenced from outside the
module in which it is defined.
External RAM - PIC17CXXX and PIC18CXXX Devices Only
Off-chip Read/Write memory.
External Symbol (Linkers)
A symbol for an identifier which has external linkage.
External Symbol Definition (Linkers)
A symbol for a function or variable defined in the current module.
External Symbol Reference (Linkers)
A symbol which references a function or variable defined outside the current module.
External Symbol Resolution (Linkers)
A process performed by the linker in which external symbol definitions from all input
modules are collected in an attempt to resolve all external symbol references. Any
external symbol references which do not have a corresponding definition cause a linker
error to be reported.
F
File Registers
On-chip general purpose and special function registers.
Flash
A type of EEPROM where data is written or erased in blocks instead of bytes.
FNOP
Forced No Operation. A forced NOP cycle is the second cycle of a two-cycle
instruction. Since the PICmicro microcontroller architecture is pipelined, it prefetches
the next instruction in the physical address space while it is executing the current
instruction. However, if the current instruction changes the program counter, this
prefetched instruction is explicitly ignored, causing a forced NOP cycle.
G
GPR
General Purpose Register. The portion of PICmicro MCU data memory (RAM)
available for general use, e.g., program-specific variables.
 2002 Microchip Technology Inc.