SW006010 Microchip Technology, SW006010 Datasheet - Page 60

• Manufacturer Part Number: SW006010
• Description: MPLAB 17C SOFTWARE
• Manufacturer: Microchip Technology

Specifications of SW006010

• Tool Function: Compiler
• Tool Type: Compiler
• Processor Series: PIC17C
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• For Use With/related Products: MPLAB®
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MPLAB
5.11
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INTERRUPT SUPPORT MACROS
C17 C Compiler User’s Guide
MPLAB C17 provides interrupt support macros and code for saving and restoring
context during interrupt handling. The use of such macros and code are optional. It is
recommended that interrupt handling be done in the assembler to reduce latency and
minimize overhead.
Each PICmicro MCU processor has two interrupt support assembly files. One is for
the small model and the other for the large model as before. These files contain code
fragments that save critical special function registers, call the interrupt handling
function and returns from the interrupt. The registers are saved as follows:
• First ALUSTA is saved primarily to preserve the Z bit. The saved ALUSTA can go
• Second, PCLATH is saved at location 0xFE or the equivalent location in the same
• Finally BSR and WREG are saved in bank 0 at locations 0xFD and 0xFC,
Here is how the highest addresses in data memory would look if an interrupt occurred
while BSR was pointing to bank 2 on the PIC17C756. (For the PIC17C44 only banks 0
and 1 are used.)
Table 5.2: Interrupt Example
in any bank (since BSR isn't known at that time) but always at location 0xFF. The
interrupt support code reserves location 0xFF in all banks for
manner as with ALUSTA. The interrupt support code reserves location 0xFE in all
banks for
respectively. The interrupt support code reserves locations 0xFD and 0xFC in
bank 0 for
0xFB
0xFC
0xFD
0xFE
0xFF
Note: Startup code supplied with MPLAB C17 does not support nested
interrupts.
save_PCLATH
save_BSR
<Reserved>
<Reserved>
save_WREG
<Available>
save_BSR
Bank 0
and
.
save_WREG
<Reserved>
<Reserved>
<Available>
<Available>
<Available>
Bank 1
.
save_PCLATH
save_ALUSTA
<Available>
<Available>
<Available>
Bank 2
 2002 Microchip Technology Inc.
save_ALUSTA
<Reserved>
<Reserved>
<Available>
<Available>
<Available>
Bank 3
.