AT91MEC01 Atmel, AT91MEC01 Datasheet - Page 10

• Manufacturer Part Number: AT91MEC01
• Description: AT91 MEMORY EXTENSION CARD
• Manufacturer: Atmel

Specifications of AT91MEC01

• Accessory Type: Memory Extension Card
• For Use With/related Products: AT91 ARM Thumb MCU Evaluation Board
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Memory Mapping with AT91MEC01
3.2
3.2.1
3.2.2
3.2.3
3.2.4
3.2.5
3.3
3-2
Configuring the
AT91 Evaluation
Board EBI
MCU Chip Select
Registers 0 and 1
MCU Chip Select
Register 2
MCU Chip Select
Register 3
MCU Chip Select
Registers 4 and 5
MCU Memory
Control Register
Configuring the
EBI to Boot from
Flash 0 or 1
The EBI must be programmed to support the AT91MEC01, and integrate the additional
memory into the microcontroller address space.
The base addresses of the memory banks can be configured as the user requires. In the
setup below, the base address of Flash 0 (AT49BV1604) is 0x0300 0000, the Flash 1
base address is 0x0400 0000, and both SRAM banks are mapped contiguously from
address 0x0500 0000.
The number of wait states is calculated using a system clock at 25 MHz. If a different
system clock frequency is used, the number of wait states should be changed in order to
optimize the microcontroller performance.
NCS0 selects the boot non-volatile memory. NCS1 selects the external SRAM of the
AT91 evaluation board. The values of NCS0 and NCS1 must not be changed.
NCS2 selects Flash 0 when the E3 link is closed. It is programmed with the value
0x0300 24B5.
This configuration enables the EBI and selects a 4 MB bank at address 0x0300 0000
with a 16-bit data bus with byte write access that has six wait states and two data float
time cycles.
NCS3 selects Flash 1 when the E5 link is closed. It is programmed with the value
0x0400 24B5.
This configuration enables the EBI, and selects a 4 MB bank at address 0x0400 0000
with a 16-bit data bus with byte write access that has six wait states and two data float
time cycles.
CS4 and CS5 select the SRAM banks. Depending on the activity of these lines, the links
E6 and E8 or E7 and E9 must be closed. In the cases of the EB01, EB42 or EB63, CS4
and CS5 are multiplexed with address lines and are active high. This requires that links
E7 and E9 be closed. In the case of the EB55, CS4 and CS5 are active low. This
requires that links E6 and E8 be closed.
In the example configuration, CS4 must be programmed with value 0x0500 2021. CS5
must be programmed with the value 0x0510 2021.
This configuration enables CS4 and CS5, and selects a 1 MB bank with a 16-bit data
bus and byte select access that has one wait state and no data float time.
This creates a contiguous 2 MB SRAM bank from address 0x0500 0000.
Except for the EB55, the ALE field of the Memory Control Register must be programmed
with 0x6. This enables the pins A20/CS7 to be driven as the address lines, and the pins
A23/CS4 to be driven as chip select lines.
In order to boot from either Flash memory on the AT91MEC01, all devices connected to
NCS0 on the AT91 evaluation board must be disabled. To do this:








On the AT91EB01, desolder the U3 Flash (or cut the chip select of this device and tie
it high).
On the AT91EB63, make sure the E3 link is open by cutting the wire.
On the AT91EB42 and AT91EB55, make sure the CB9 link is open by cutting the wire.
On the AT91MEC01, enable the required Flash with NCS0 by closing link E2 for Flash
0 or link E4 for Flash 1.
AT91MEC01 User Guide