IE-789468-NS-EM1 Renesas Electronics America, IE-789468-NS-EM1 Datasheet - Page 43

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IE-789468-NS-EM1

Manufacturer Part Number
IE-789468-NS-EM1
Description
BD EMULATOR 78K0S UPD789468
Manufacturer
Renesas Electronics America
Datasheet

Specifications of IE-789468-NS-EM1

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
(2) Signals input from the target system via a gate
Since the following signals are input via a gate, their timing shows a delay compared to the
and 179327 Subseries. Refer to Figure 4-2 Emulation Circuit Equivalent Circuit 2.
• RESET signal
• Signals related to clock input
• CAPH and CAPL signals (available for
• V
(V
Subseries only)
CHAPTER 4
LC0
LC1
The X2 and XT2 pins are not used in the IE-789468-NS-EM1.
is available for PD789467
to V
(Available for PD789467
Subseries only)
(Available for PD789467
Subseries only)
V
(Target system)
LC0
LC2
Probe side
and V
X1, XT1
X2, XT2
RESET
signals (V
CAPH
CAPL
V
DIFFERENCES BETWEEN TARGET DEVICE AND TARGET INTERFACE CIRCUIT
LC1
LC2
Figure 4-2. Emulation Circuit Equivalent Circuit 2
LC1
USER
and V
ICE
USER
USER
ICE
ICE
LC2
100
SW3
User’s Manual U16482EJ1V0UM
are available for
OPEN
0.1 F
0.1 F
0.1 F
SW2 (VLCD)
SW2 (VLCD)
USER
µ
PD789467 Subseries only)
ICE
ON-OFF
SW4-1
SW3
HC4066
µ
1 M
PD789467 Subseries only)
V
LV
CC
R43
30 k
R44
10 k
R45
10 k
CC
4.7 k
(IE-789468-NS-EM1)
IE system side
RESET
X1, XT1
V
V
CAPH
CAPL
LC0
LC2
and V
µ
PD789327, 789467,
LC1
41

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