HS7144KCI02H Renesas Electronics America, HS7144KCI02H Datasheet - Page 195

• Manufacturer Part Number: HS7144KCI02H
• Description: ON CHIP DEBUG EMULATOR W/TRACE
• Manufacturer: Renesas Electronics America
• Type: In Circuit Debuggerr

Specifications of HS7144KCI02H

• Contents: E10A-LITE, Cable and CD-ROM
• For Use With/related Products: SH7144
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

25. Note on Downloading Program
26. Support of Double Float Format
27. Note on Continuous Step Execution
28. Note on Using the [Run program] Dialog Box
29. When the user program is loaded in the CS0 area by loading a session, the program will not be
30. Processing Time for Updating the Flash Memory Contents
In the [Load Program] dialog box, which is opened when [Load Program…] is selected, the
verify function is invalid. After downloading the program, perform verify in the [Verify S-
Record File with Memory] dialog box, which is opened when [Verify] is selected from the
[Memory] menu.
In the following memory operations, the double float format is not supported:
When the step is continuously executed by selecting [Step...] from the [Run] menu, do not use
the BREAKPOINT because this may cause the HDI to abnormally operate.
When [Run...] is selected from the [Run] menu to specify the stop address, there is the
following note:
correctly loaded if the bus size for CS0 is illegal. Set the bus size by using the BCR1 register,
then load the program again.
When the contents of the flash memory area is modified by the program loading, memory
window, or memory command, or when a software break is set, a waiting time will be
generated to write or read the flash memory before executing the user program.
The processing time for updating the flash memory contents will be about a maximum of 60
seconds under the following environments (reference values):
[Fill Memory] dialog box
[Search Memory] dialog box
MEMORY_FILL command
The [Format] specification in the [Copy Memory] dialog box is ignored. Memory is
copied in a byte unit.
When the breakpoint that has been set as Disable is specified as the stop address, note that
the breakpoint becomes Enable when the user program stops.
Host computer: 500 MHz (Pentium
SH7144F: 40 MHz (system clock frequency)
®
III)
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