Z8F6423FT00ZEM Zilog, Z8F6423FT00ZEM Datasheet - Page 104
![KIT ICE Z8 ENCORE 64K 80QFP](/photos/9/27/92758/z8f6423ft00zem_sml.jpg)
Z8F6423FT00ZEM
Manufacturer Part Number
Z8F6423FT00ZEM
Description
KIT ICE Z8 ENCORE 64K 80QFP
Manufacturer
Zilog
Series
Z8 Encore!®r
Type
In-Circuit Emulator Systemr
Specifications of Z8F6423FT00ZEM
Contents
Emulator Board, Cables, Software and Documentation
For Use With/related Products
Z8 Encore! 80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3397
- Current page: 104 of 297
- Download datasheet (9Mb)
Table 46. Timer 0-3 Control 1 Register (TxCTL1)
PS019921-0308
BITS
FIELD
RESET
R/W
ADDR
Timer 0-3 Control 1 Registers
TEN
7
The Timer 0-3 Control 1 (TxCTL1) registers enable/disable the timers, set the prescaler
value, and determine the timer operating mode.
TEN—Timer Enable
0 = Timer is disabled.
1 = Timer enabled to count.
TPOL—Timer Input/Output Polarity
Operation of this bit is a function of the current operating mode of the timer.
ONE-SHOT mode
When the timer is disabled, the Timer Output signal is set to the value of this bit.
When the timer is enabled, the Timer Output signal is complemented upon timer
Reload.
CONTINUOUS mode
When the timer is disabled, the Timer Output signal is set to the value of this bit.
When the timer is enabled, the Timer Output signal is complemented upon timer
Reload.
COUNTER mode
When the timer is disabled, the Timer Output signal is set to the value of this bit.
When the timer is enabled, the Timer Output signal is complemented upon timer
Reload.
0 = Count occurs on the rising edge of the Timer Input signal.
1 = Count occurs on the falling edge of the Timer Input signal.
PWM mode
0 = Timer Output is forced Low (0) when the timer is disabled. When enabled,
the Timer Output is forced High (1) upon PWM count match and forced
Low (0) upon Reload.
TPOL
6
5
F07H, F0FH, F17H, F1FH
PRES
4
R/W
0
3
Z8 Encore! XP
2
Product Specification
TMODE
1
®
F64XX Series
0
Timers
90
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