EPS-AVRJTAG-BUNDLE Equinox Technologies, EPS-AVRJTAG-BUNDLE Datasheet - Page 2

ISP PORTABLE AVR JTAG UPGRAD

EPS-AVRJTAG-BUNDLE

Manufacturer Part Number
EPS-AVRJTAG-BUNDLE
Description
ISP PORTABLE AVR JTAG UPGRAD
Manufacturer
Equinox Technologies
Series
Epsilon5r
Type
Portable ISPr
Datasheet

Specifications of EPS-AVRJTAG-BUNDLE

Contents
Programmer, Software, Cables and Documentation
For Use With/related Products
ATMEL AT89S, AVR, AT91SAM7, NXP P89C51Rx2 P89C66x, Zensys, Serial EEPROM's
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
483-1016
Equinox Products Page - EPSILON5 MKII - Portable ISP Programmer and Atmel Atmega AVR JTAG Upgrade...
http://www.equinox-tech.com/products/details.asp?ID=1321
Supports all popular ISP Headers to connect to the Target System
Main Features of JTAG Upgrade
Advantages of JTAG Programming
JTAG connections (Single JTAG Device)
JTAG Chain Programming Support
Mode
Atmel 10-way SPI Header (as per STK200 / STK500)
Atmel 6-way SPI Header
Equinox 10-way SPI header with support for Slave Select & SCK2
Atmel 10-way JTAG header (as per Atmel JTAG-ICE)
Equinox 10-way UART header for Atmel T89C51Rx2 (8051) and Philips P89C51 ISP FLASH
microcontrollers
Supports high-speed JTAG programming of a single Atmel AVR microcontroller connected via
the JTAG interface
Supports high-speed JTAG programming of multiple Atmel AVR microcontrollers which are
connected as part of a 'JTAG Chain' (JTAG daisy-chain mode).
Fast programming speeds via JTAG (3 - 4 times faster than SPI method)
Simple 4-wire JTAG Interface to microcontroller
Same JTAG Interface as Atmel JTAG ICE MK2 Debugger
User-selectable JTAG frequency
Supports JTAG Chain Validation
Supports checking of the 'JTAG ID' of both AVR and any generic JTAG devices eg. CPLD's
Supports automatic checking of 'Silicon Revision' of target JTAG device
The JTAG algorithm is approximately 3-4 times faster at programming compared to the SPI
algorithm.
The programming time using JTAG for the EEPROM is significantly faster than the SPI
algorithm
The JTAG algorithm uses the same ‘JTAG Port’ as the Atmel JTAG-ICE Debugger.
In JTAG mode is it possible to change the ‘Clock Selection Fuses’ to any value and still
program the chip. (with the exception of the ‘JTAGEN’ Fuse)
It is possible to daisy-chain multiple JTAG devices on the JTAG bus in a so-called ‘JTAG
Chain’ and then select to program a particular device in the chain. This functionality is now
supported by Equinox programmers running firmware 3.07 and above.
Supports high-speed JTAG programming of a single Atmel AVR microcontroller
Uses only 4 x JTAG pins + control of the AVR RESET pin
Uses the same JTAG port pins as used by the Atmel JTAG ICE debugger
Further Information
Downloads
Product Software
Product News
Cost-effective programmer 'Bundles' available
- Epsilon5 & FS2009
Product Upgrades
View Downloads for this Product
13 January 2009:
>>
ISP Header Overview
EQTools Version 2
ASCII Text
Communications (ATC) -
Serial Control Protocol
for Equinox
Programmers
Atmel AT91SAM7 -
ARM7 JTAG Device
Library Licence -
Overview
ConsoleEDS - Overview
>>
EQTools Script Builder
License Upgrades
ISP-PRO Upgrades
JTAG In-System
Programming (ISP)
Support for Atmel
ATmega AVR
Microcontrollers
LabView Control License
Upgrades
Remote Application
Control of Equinox
Programmers - Overview
>>
24xxx - Serial I2C
EEPROM Memory -
Device Library -
Overview
>>
>>
>>
Page 2 of 4
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2/4/2009
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