COP8SG-EPU National Semiconductor, COP8SG-EPU Datasheet - Page 46

• Manufacturer Part Number: COP8SG-EPU
• Description: BOARD PROTOTYPE/TARGET COP8
• Manufacturer: National Semiconductor
• Type: MCUr

Specifications of COP8SG-EPU

• Contents: *
• For Use With/related Products: Cop 8
• For Use With: COP8SG-EPU - BOARD PROTOTYPE/TARGET COP8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

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Note 14: =
Instruction Execution Time
Most instructions are single byte (with immediate addressing
mode instructions taking two bytes).
Most single byte instructions take one cycle time to execute.
Skipped instructions require x number of cycles to be
skipped, where x equals the number of bytes in the skipped
instruction opcode.
Bytes and Cycles per Instruction
The following table shows the number of bytes and cycles for
each instruction in the format of byte/cycle.
Arithmetic and Logic Instructions
Memory Transfer Instructions
ADD
ADC
SUBC
AND
OR
XOR
IFEQ
IFNE
IFGT
IFBNE
DRSZ
SBIT
RBIT
IFBIT
RPND
>
X A, (Note 14)
LD A, (Note 14)
LD B, Imm
LD B, Imm
LD Mem, Imm
LD Reg, Imm
IFEQ MD, Imm
Memory location addressed by B or X or directly.
[B]
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
Direct
3/4
3/4
3/4
3/4
3/4
3/4
3/4
3/4
3/4
1/3
3/4
3/4
3/4
[B]
1/1
1/1
2/2
Register
Indirect
1/3
1/3
[X]
Immed.
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
Direct
2/3
2/3
3/3
2/3
3/3
Immed.
46
2/2
1/1
2/2
Instructions Using A & C
Transfer of Control Instructions
CLRA
INCA
DECA
LAID
DCOR
RRCA
RLCA
SWAPA
SC
RC
IFC
IFNC
PUSHA
POPA
ANDSZ
JMPL
JMP
JP
JSRL
JSR
JID
VIS
RET
RETSK
RETI
INTR
NOP
[B+, B−]
Auto Incr. & Decr.
Register Indirect
1/2
1/2
2/2
[X+, X−]
1/1
1/1
1/1
1/3
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/3
1/3
2/2
3/4
2/3
1/3
3/5
2/5
1/3
1/5
1/5
1/5
1/5
1/7
1/1
1/3
1/3
(IF B
(IF B
<
>
16)
15)